Difference between revisions of "Hardware/Espresso"
< Hardware
Jump to navigation
Jump to search
m (Disabling vWii underlock (FIX94) rev.) |
|||
Line 43: | Line 43: | ||
== vWii Mode Clock == | == vWii Mode Clock == | ||
While entering in vWii mode, Cafe2Wii reboots the PPC and sets the clock multiplier to 3x. | While entering in vWii mode, Cafe2Wii reboots the PPC and sets the clock multiplier to 3x. | ||
− | This can be disabled by changing in Cafe2Wii an '''OR 0x20''' to '''BIC 0x20''' in ''' | + | This can be disabled by changing in Cafe2Wii an '''OR 0x20''' to '''BIC 0x20''' in '''LT_MEMCMPT''' (0x0d8005b0) and an '''OR 0x99''' to '''OR 0x9D''' in '''LT_SYSPROT''' (0x0d800514) [[Hardware/Latte_Registers|Latte Registers]]. |
[[Category:Hardware]] | [[Category:Hardware]] |
Revision as of 20:18, 19 November 2019
Espresso is the code name for the Wii U's PowerPC processor.
Special Purpose Registers
Note: This section is redundant to SPRs.
Index | Name | Description |
---|---|---|
0x3b0 | HID5[0] | Enable HID5 |
0x3b0 | HID5[1] | Enable PIR |
0x3B3 | SCR[1] | Enable bootrom (reset only) |
0x3B3 | SCR[2] | Enable keystore 00..1f (reset only) |
0x3B3 | SCR[3] | Enable keystore 20..3f (reset only) |
0x3B3 | SCR[9] | Start core 1 |
0x3B3 | SCR[10] | Start core 2 |
0x3EF | PIR | CPU core index (Processor Index Register) |
vWii Mode Clock
While entering in vWii mode, Cafe2Wii reboots the PPC and sets the clock multiplier to 3x. This can be disabled by changing in Cafe2Wii an OR 0x20 to BIC 0x20 in LT_MEMCMPT (0x0d8005b0) and an OR 0x99 to OR 0x9D in LT_SYSPROT (0x0d800514) Latte Registers.