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PPC is the [[:/dev/bsp]] entity responsible for managing the PowerPC cores in the [[Espresso]]. Depending on hardware version{{check}}, PPC either has one instance or three instances.
+
PPC is the [[:/dev/bsp]] entity responsible for managing the PowerPC cores in the [[Espresso]]. Depending on hardware version{{check}}, PPC either has one instance or three instances, one for each PowerPC core.
== Attributes ==
== Attributes ==
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=== Exec ===
+
=== Exe ===
'''Availability''': This attribute is only available on the first instance (index 0).
'''Availability''': This attribute is only available on the first instance (index 0).
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//start the PowerPC
//start the PowerPC
int8_t start = 2;
int8_t start = 2;
−
bspWrite("PPC", 0, "Exec", 1, &start);
+
bspWrite("PPC", 0, "Exe", 1, &start);
//stop the PowerPC
//stop the PowerPC
int8_t stop = 1;
int8_t stop = 1;
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bspWrite("PPC", 0, "Exec", 1, &stop);
+
bspWrite("PPC", 0, "Exe", 1, &stop);
</syntaxhighlight>
</syntaxhighlight>
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| Query
| Query
| 16
| 16
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| constant
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| [[/Summary|see page]]
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| Returns a buffer filled with data calculated based on the hardware version at BSP init time. The data is identical between instances.
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| Returns information about the PowerPC on this board, including the core count and bus speeds. The information returned is the same for all instances.
|}
|}
+
<syntaxhighlight lang="C">
+
typedef struct {
+
uint32_t systemClockFrequency;
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uint32_t timerFrequency;
+
} BSP_SYSTEM_CLOCK_INFO;
+
typedef struct {
+
uint32_t numberOfCores;
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uint32_t activeCoreBitmap; //bit 0/LSB = core 0, bit 1 = core 1, etc.
+
BSP_SYSTEM_CLOCK_INFO clock60x;
+
} BSP_PPC_SUMMARY;
+
+
BSP_PPC_SUMMARY ppc;
+
bspRead("PPC", 0, "Summary", sizeof(ppc), &ppc);
+
+
printf("powerpc has %d cores\n", ppc.numberOfCores);
+
</syntaxhighlight>
=== CoreProperties ===
=== CoreProperties ===
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| Query
| Query
| 21
| 21
−
| constant
+
| [[/CoreProperties|see page]]
−
| Returns a buffer filled with data calculated based on the hardware version at BSP init time. The data is unique between instances.
+
| Returns information about the cache of a given PowerPC core.
|}
|}
+
<syntaxhighlight lang="C">
+
typedef struct {
+
uint32_t l2Size;
+
uint32_t l2LineSize;
+
uint32_t l2SectorSize;
+
uint32_t l2FetchSize;
+
uint32_t l2SetAssociativity;
+
uint8_t coreActive;
+
} BSP_PPC_CORE_PROPERTIES;
+
+
BSP_PPC_CORE_PROPERTIES core1;
+
bspRead("PPC", 1, "CoreProperties", sizeof(core1), &core1);
+
+
printf("core 1 l2 cache size: %x\n", core1.l2Size);
+
</syntaxhighlight>
=== PVR ===
=== PVR ===
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| 4
| 4
|
|
−
| Reads out unknown properties from two [[:/dev/bsp/EE|EE]] instances and concatenates them.
+
| Reads out the PVR from {{hw|SEEPROM}} via [[:/dev/bsp/EE|EE]]. This is kept at offset 0x10 on Latte hardware, and 0x42 on Hollywood/Bollywood hardware.
|-
|-
| Write
| Write
| 4
| 4
|
|
−
| Sets [[:/dev/bsp/EE|EE]]'s first instance's control flag, then writes out the input value to two unknown EE instances.
+
| Sets [[:/dev/bsp/EE|EE]]'s first instance's control flag, then writes out the input value to 0x10 on Latte hardware, and 0x42 on Hollywood/Bollywood hardware.
|}
|}