Line 52:
Line 52:
| MEM0
| MEM0
| Reserved (IOSU)
| Reserved (IOSU)
+
|-
+
| 0x0C000000
+
| 0x0C3FFFFF
+
| 0x400000
+
| MMIO
+
| {{hw|Espresso Registers}} (GX2/DSP/OTP)
+
|-
+
| 0x0D000000
+
| 0x0D005FFF
+
| 0x6000
+
| MMIO
+
| [[:Hardware/Latte_registers|Latte registers (shared with Espresso)]]
+
|-
+
| 0x0D006000
+
| 0x0D00FFFF
+
| 0xA000
+
| MMIO
+
| [[:Hardware/Legacy|Legacy registers]] (DI/SI/EXI/AI)
+
|-
+
| 0x0D010000
+
| 0x0D01FFFF
+
| 0x10000
+
| MMIO
+
| [[:Hardware/NAND_interface|NAND registers]]
+
|-
+
| 0x0D020000
+
| 0x0D02FFFF
+
| 0x10000
+
| MMIO
+
| [[:Hardware/AES_engine|AES registers]] (has a virtual mapping at 0x0D820000)
+
|-
+
| 0x0D030000
+
| 0x0D03FFFF
+
| 0x10000
+
| MMIO
+
| [[:Hardware/SHA-1_engine|SHA-1 registers]] (has a virtual mapping at 0x0D830000)
+
|-
+
| 0x0D040000
+
| 0x0D04FFFF
+
| 0x10000
+
| MMIO
+
| [[:Hardware/USB_Host_Controller|EHCI-0 registers]]
+
|-
+
| 0x0D050000
+
| 0x0D05FFFF
+
| 0x10000
+
| MMIO
+
| [[:Hardware/USB_Host_Controller|OHCI-0:0 registers]]
+
|-
+
| 0x0D060000
+
| 0x0D06FFFF
+
| 0x10000
+
| MMIO
+
| [[:Hardware/USB_Host_Controller|OHCI-0:1 registers]]
+
|-
+
| 0x0D070000
+
| 0x0D07FFFF
+
| 0x10000
+
| MMIO
+
| [[:Hardware/SD_Host_Controller|SDIO registers]]
+
|-
+
| 0x0D080000
+
| 0x0D08FFFF
+
| 0x10000
+
| MMIO
+
| [[:Hardware/SD_Host_Controller|SDIO registers]] ([[:Hardware/802.11_Wireless|802.11 Wireless]])
+
|-
+
| 0x0D100000
+
| 0x0D10FFFF
+
| 0x10000
+
| MMIO
+
| [[:Hardware/SD_Host_Controller|SDIO registers]] (eMMC)
+
|-
+
| 0x0D110000
+
| 0x0D11FFFF
+
| 0x10000
+
| MMIO
+
| [[:Hardware/SD_Host_Controller|SDIO registers]] (Toucan)
+
|-
+
| 0x0D120000
+
| 0x0D12FFFF
+
| 0x10000
+
| MMIO
+
| [[:Hardware/USB_Host_Controller|EHCI-1 registers]]
+
|-
+
| 0x0D130000
+
| 0x0D13FFFF
+
| 0x10000
+
| MMIO
+
| [[:Hardware/USB_Host_Controller|OHCI-1:0 registers]]
+
|-
+
| 0x0D140000
+
| 0x0D14FFFF
+
| 0x10000
+
| MMIO
+
| [[:Hardware/USB_Host_Controller|EHCI-2 registers]]
+
|-
+
| 0x0D150000
+
| 0x0D15FFFF
+
| 0x10000
+
| MMIO
+
| [[:Hardware/USB_Host_Controller|OHCI-2:0 registers]]
+
|-
+
| 0x0D160000
+
| 0x0D16FFFF
+
| 0x10000
+
| MMIO
+
| [[:Hardware/SATA_Controller|SATA registers]]
+
|-
+
| 0x0D180000
+
| 0x0D18FFFF
+
| 0x10000
+
| MMIO
+
| [[:Hardware/AES_engine|AESS registers]] (has a virtual mapping at 0x0D980000)
+
|-
+
| 0x0D190000
+
| 0x0D19FFFF
+
| 0x10000
+
| MMIO
+
| [[:Hardware/SHA-1_engine|SHAS-1 registers]] (has a virtual mapping at 0x0D990000)
+
|-
+
| 0x0D400000
+
| 0x0D40FFFF
+
| 0x10000
+
| SRAM1
+
| [[boot1]] (mirrored in 0xFFF00000)
+
|-
+
| 0x0D410000
+
| 0x0D41FFFF
+
| 0x10000
+
| SRAM0
+
| [[:boot0]] (mirrored in 0xFFFF0000)
+
|-
+
| 0x0D800000
+
| 0x0D805FFF
+
| 0x6000
+
| MMIO
+
| [[:Hardware/Latte_registers|Latte registers]]
+
|-
+
| 0x0D8B0000
+
| 0x0D8B3FFF
+
| 0x4000
+
| MMIO
+
| [[:Hardware/AHMN_controller|AHMN registers]]
+
|-
+
| 0x0D8B4000
+
| 0x0D8BFFFF
+
| 0xC000
+
| MMIO
+
| [[:Hardware/Memory_controller|Memory Controller registers]]
|-
|-
| 0x10000000
| 0x10000000
Line 57:
Line 207:
| 0x100000
| 0x100000
| MEM2
| MEM2
−
| Unknown (IOSU)
+
| [[Boot1#get_boot_info|boot1 warmboot PRSH/PRST]]
|-
|-
| 0x10100000
| 0x10100000
Line 169:
Line 319:
| 0x8000000
| 0x8000000
| MEM2
| MEM2
−
| Unknown (IOSU)
+
| RAMDISK
|-
|-
| 0x28000000
| 0x28000000
Line 187:
Line 337:
Cafe OS loader, libraries and apps
Cafe OS loader, libraries and apps
|-
|-
−
| 0xFFE00000
+
| 0xFFC00000
−
| 0xFFF1FFFF
+
| 0xFFE7FFFF
−
| 0x120000
+
| 0x280000
−
| ???
+
| UNK
−
| PPC Cafe OS kernel (mirror of ancast)
+
| Used by Cafe OS (codegen and PPC kernel ancast image mirror)
|-
|-
| 0xFFF00000
| 0xFFF00000
Line 198:
Line 348:
| SRAM1
| SRAM1
| C2W (cafe2wii) boot heap (used to store the old Wii SEEPROM data)
| C2W (cafe2wii) boot heap (used to store the old Wii SEEPROM data)
+
|-
+
| 0xFFFE0000
+
| 0xFFFE7FFF
+
| 0x8000
+
| SRAM1
+
| Mirror of SRAM1. Hai C2W uses this one for (some) Hai params instead of the former?<br>IOS80 also uses this one for SEEPROM data despite the data being written to the former.
|-
|-
| 0xFFFF0000
| 0xFFFF0000