Difference between revisions of "Hardware/DMCU"
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== Firmware == | == Firmware == | ||
− | The DMCU firmware is loaded by [[nn_cmpt.rpl]]. The firmware is stored in [[OSv0]]/[[OSv1]] | + | The DMCU firmware is loaded by [[nn_cmpt.rpl]]. The firmware is stored in [[OSv0]]/[[OSv1]] in ASCII text form with a NULL terminator at the end. |
+ | |||
+ | Each line starts with the address in hex, prefixed with an <code>@</code>, followed by one or more bytes in hex written to the address, and ends with a LF character. | ||
+ | |||
+ | The following line would write <code>AB CD</code> to address <code>0123</code>: | ||
+ | @0123 AB CD | ||
== Memory Map == | == Memory Map == | ||
Line 11: | Line 16: | ||
! Description | ! Description | ||
|- | |- | ||
− | | 0x0000- | + | | 0x0000-0x00ff |
− | | | + | | 0x100 |
− | | RAM | + | | RAM (Contains soft registers) |
|- | |- | ||
| 0x0100-0x5fff | | 0x0100-0x5fff | ||
Line 25: | Line 30: | ||
| 0x8100-0x93FF{{check}} | | 0x8100-0x93FF{{check}} | ||
| 0x1300 | | 0x1300 | ||
− | | DC registers 0x4100+ | + | | DC write registers 0x4100+ |
|- | |- | ||
| 0x9400-0x940F | | 0x9400-0x940F | ||
Line 33: | Line 38: | ||
| 0x9600-0xBFFF{{check}} | | 0x9600-0xBFFF{{check}} | ||
| 0x2A00 | | 0x2A00 | ||
− | | DC registers 0x5600+ | + | | DC write registers 0x5600+ |
|- | |- | ||
| 0xFFC0-0xFFFF | | 0xFFC0-0xFFFF | ||
Line 39: | Line 44: | ||
| Vectors | | Vectors | ||
|} | |} | ||
+ | |||
+ | == DC Interface == | ||
+ | {{reglist|DC Interface Registers}} | ||
+ | {{rld|0x9402|8|Write Control|DMCU waits for the lowest bit to be set before performing any writes}} | ||
+ | {{rld|0x9404|32|Write Data|Little endian value which can be used to perform a 32-bit write}} | ||
+ | {{rld|0x9408|16|Read Address|Address divided by 4 to read from the DC}} | ||
+ | {{rld|0x940A|8|Read Control|DMCU waits for the lowest bit to be set after writing to '''Read Address'''}} | ||
+ | {{rld|0x940C|32|Read Data|Little endian value which contains the data from a 32-bit read}} | ||
+ | |} | ||
+ | |||
+ | To write to the DC, wait for the lowest '''Write Control''' bit to be set, then write a 8 bit value to any of the '''DC write registers'''. Writing 0xFF to a register triggers a 32-bit write using the '''Write Data''' register. | ||
+ | |||
+ | To read from the DC, write an address to '''Read Address''' and wait for the lowest '''Read Control''' bit to be set. '''Read Data''' now contains the data read. |
Latest revision as of 16:33, 11 March 2023
The DMCU is a M68HC11 compatible microcontroller which manages the Display Controller while in vWii mode.
Firmware
The DMCU firmware is loaded by nn_cmpt.rpl. The firmware is stored in OSv0/OSv1 in ASCII text form with a NULL terminator at the end.
Each line starts with the address in hex, prefixed with an @
, followed by one or more bytes in hex written to the address, and ends with a LF character.
The following line would write AB CD
to address 0123
:
@0123 AB CD
Memory Map
Address range | Size | Description |
---|---|---|
0x0000-0x00ff | 0x100 | RAM (Contains soft registers) |
0x0100-0x5fff | 0x5F00 | External RAM (Contains data, text, rodata, and stack) |
0x8000-0x803F | 0x40 | M68HC11 control registers |
0x8100-0x93FF[check] | 0x1300 | DC write registers 0x4100+ |
0x9400-0x940F | 0x10 | DC interface registers |
0x9600-0xBFFF[check] | 0x2A00 | DC write registers 0x5600+ |
0xFFC0-0xFFFF | 0x40 | Vectors |
DC Interface
DC Interface Registers | |||
---|---|---|---|
Address | Bits | Name | Description |
0x9402 | 8 | Write Control | DMCU waits for the lowest bit to be set before performing any writes |
0x9404 | 32 | Write Data | Little endian value which can be used to perform a 32-bit write |
0x9408 | 16 | Read Address | Address divided by 4 to read from the DC |
0x940A | 8 | Read Control | DMCU waits for the lowest bit to be set after writing to Read Address |
0x940C | 32 | Read Data | Little endian value which contains the data from a 32-bit read |
To write to the DC, wait for the lowest Write Control bit to be set, then write a 8 bit value to any of the DC write registers. Writing 0xFF to a register triggers a 32-bit write using the Write Data register.
To read from the DC, write an address to Read Address and wait for the lowest Read Control bit to be set. Read Data now contains the data read.