301
edits
Changes
no edit summary
Line 184:
Line 184:
−
−
−
−
−
−
Line 498:
Line 506:
Line 507:
Line 516:
−
Line 577:
Line 588:
−
u32 iostrength_ctrl1_val = *(u32 *)HW_IOSTRCTRL1;
u32 iostrength_ctrl1_val = *(u32 *)HW_IOSTRCTRL1;
if (((iostrength_flags >> 0x0F) & 0x01) != 0) {
+ if (((iostrength_flags >> 0x0F) & 0x01) != 0)
+ {
iostrength_ctrl0_val &= 0xFFFC7FFF;
iostrength_ctrl0_val &= 0xFFFC7FFF;
iostrength_ctrl0_val |= ((iostrength_flags << 0x11) >> 0x1D) << 0x0F;
iostrength_ctrl0_val |= ((iostrength_flags << 0x11) >> 0x1D) << 0x0F;
Line 191:
Line 192:
*(u32 *)HW_IOSTRCTRL0 = iostrength_ctrl0_val;
*(u32 *)HW_IOSTRCTRL0 = iostrength_ctrl0_val;
if (((iostrength_flags >> 0x0F) & 0x01) != 0) {
+ if (((iostrength_flags >> 0x0F) & 0x01) != 0)
+ {
iostrength_ctrl1_val &= 0xFFFC7FFF;
iostrength_ctrl1_val &= 0xFFFC7FFF;
iostrength_ctrl1_val |= (iostrength_flags & 0x07) << 0x0F;
iostrength_ctrl1_val |= (iostrength_flags & 0x07) << 0x0F;
}
}
if (((iostrength_flags >> 0x07) & 0x01) != 0) {
+ if (((iostrength_flags >> 0x07) & 0x01) != 0)
+ {
iostrength_ctrl1_val &= 0xFFE3FFFF;
iostrength_ctrl1_val &= 0xFFE3FFFF;
iostrength_ctrl1_val |= ((iostrength_flags << 0x19) >> 0x1D) << 0x12;
iostrength_ctrl1_val |= ((iostrength_flags << 0x19) >> 0x1D) << 0x12;
}
}
if (((iostrength_flags >> 0x0B) & 0x01) != 0) {
+ if (((iostrength_flags >> 0x0B) & 0x01) != 0)
+ {
iostrength_ctrl1_val &= 0xFFFF8FFF;
iostrength_ctrl1_val &= 0xFFFF8FFF;
iostrength_ctrl1_val |= ((iostrength_flags << 0x15) >> 0x1D) << 0x0C;
iostrength_ctrl1_val |= ((iostrength_flags << 0x15) >> 0x1D) << 0x0C;
}
}
if (((iostrength_flags >> 0x13) & 0x01) != 0) {
+ if (((iostrength_flags >> 0x13) & 0x01) != 0)
+ {
iostrength_ctrl1_val &= 0xFFFF8FFF;
iostrength_ctrl1_val &= 0xFFFF8FFF;
iostrength_ctrl1_val |= ((iostrength_flags << 0x0D) >> 0x1D) << 0x15;
iostrength_ctrl1_val |= ((iostrength_flags << 0x0D) >> 0x1D) << 0x15;
Line 244:
Line 249:
if (sec_lvl_flag == 0x00000000)
if (sec_lvl_flag == 0x00000000)
set_empty_aes_keys();
set_empty_aes_keys();
− else {
+ else
+ {
// Disable boot1 AES key access
// Disable boot1 AES key access
u32 otpprot_val = *(u32 *)LT_OTPPROT;
u32 otpprot_val = *(u32 *)LT_OTPPROT;
Line 320:
Line 326:
// Factory mode doesn't need boot1's data
// Factory mode doesn't need boot1's data
− if (!aes_seeprom_key) {
+ if (!aes_seeprom_key)
+ {
boot1_version = 0;
boot1_version = 0;
boot1_sector = 0;
boot1_sector = 0;
Line 356:
Line 363:
// Check if seeprom_1C_00 is not 0x400
// Check if seeprom_1C_00 is not 0x400
− if ((seeprom_1C_00 & 0x3FF) != 0) {
+ if ((seeprom_1C_00 & 0x3FF) != 0)
+ {
// Store at 0x0D414200
// Store at 0x0D414200
sub_D41203C(seeprom_1C_00 & 0x3FF);
sub_D41203C(seeprom_1C_00 & 0x3FF);
Line 370:
Line 378:
*(u32 *)LT_ARMIRQMASKLT = 0x1000;
*(u32 *)LT_ARMIRQMASKLT = 0x1000;
// Turn IOP2X on?
+ // Set the ARM multiplier
*(u32 *)LT_IOP2X = 0x03;
*(u32 *)LT_IOP2X = 0x03;
// Delay execution arbitrarily
// Delay execution arbitrarily
− if ((seeprom_1C_00 & 0x7C00) != 0) {
+ if ((seeprom_1C_00 & 0x7C00) != 0)
+ {
u32 time_now = *(u32 *)HW_TIMER;
u32 time_now = *(u32 *)HW_TIMER;
u32 delay = sub_D412060(seeprom_delay);
u32 delay = sub_D412060(seeprom_delay);
while (time_now < delay) {
+ while (time_now < delay)
+ {
time_now = *(u32 *)HW_TIMER;
time_now = *(u32 *)HW_TIMER;
delay = sub_D412060(seeprom_delay);
delay = sub_D412060(seeprom_delay);
Line 534:
Line 544:
// We got a response from EXI0
// We got a response from EXI0
− if (result) {
+ if (result)
+ {
u32 exi0_reply = *(u32 *)exi0_out_buf;
u32 exi0_reply = *(u32 *)exi0_out_buf;
u32 delay = sub_D412060(seeprom_delay);
u32 delay = sub_D412060(seeprom_delay);
while (time_now < delay) {
+ while (time_now < delay)
+ {
time_now = *(u32 *)HW_TIMER;
time_now = *(u32 *)HW_TIMER;
delay = sub_D412060(seeprom_delay);
delay = sub_D412060(seeprom_delay);