Difference between revisions of "Hardware/DMCU"
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| Line 22: | Line 22: | ||
| 0x40 | | 0x40 | ||
| M68HC11 control registers | | M68HC11 control registers | ||
| + | |- | ||
| + | | 0x8100-0x93FF{{check}} | ||
| + | | 0x1300 | ||
| + | | DC registers 0x4100+ | ||
|- | |- | ||
| 0x9400-0x940F | | 0x9400-0x940F | ||
| 0x10 | | 0x10 | ||
| DC interface registers | | DC interface registers | ||
| + | |- | ||
| + | | 0x9600-0xBFFF{{check}} | ||
| + | | 0x2A00 | ||
| + | | DC registers 0x5600+ | ||
|- | |- | ||
| 0xFFC0-0xFFFF | | 0xFFC0-0xFFFF | ||
Revision as of 14:54, 8 March 2023
The DMCU is a M68HC11 compatible microcontroller which manages the Display Controller while in vWii mode.
Firmware
The DMCU firmware is loaded by nn_cmpt.rpl. The firmware is stored in OSv0/OSv1 as hex encoded data.
Memory Map
| Address range | Size | Description |
|---|---|---|
| 0x0000-0x000f | 0x10 | RAM |
| 0x0100-0x5fff | 0x5F00 | External RAM (Contains data, text, rodata, and stack) |
| 0x8000-0x803F | 0x40 | M68HC11 control registers |
| 0x8100-0x93FF[check] | 0x1300 | DC registers 0x4100+ |
| 0x9400-0x940F | 0x10 | DC interface registers |
| 0x9600-0xBFFF[check] | 0x2A00 | DC registers 0x5600+ |
| 0xFFC0-0xFFFF | 0x40 | Vectors |