Changes

=== OSScreen ===

=== OSScreen ===

OSScreen is the easier of the two to reverse-engineer, and reveals some unknowns in the hardware. For example, it uses the registers at ''GpuF0MMReg'':0x6100 to set up one framebuffer - which matches the D1GRPH registers according to the RV630 Register Reference Guide (see chapter 2.7.1 - Primary Display Graphics Control Registers). However, the API ''also'' uses registers at ''GpuF0MMReg'':0x6900 identically; suggesting the existence of another display controller at that location. The Register Reference Guide does not list any registers at that address, suggesting some major differences between the GX2 and the RV630.

OSScreen is the easier of the two to reverse-engineer. It uses the registers at ''GpuF0MMReg'':0x6100 to set up one framebuffer - which matches the D1GRPH registers according to the RV630 Register Reference Guide (see chapter 2.7.1 - Primary Display Graphics Control Registers) and uses the registers at ''GpuF0MMReg'':0x6900 identically - which matches the D2GRPH registers according to the RS780 Register Reference Guide (see chapter 2.9.12 - Secondary Display Graphics Control Registers).

OSScreen uses the following D1 registers: D1CRTC_BLANK_CONTROL (sets D1CRTC_BLANK_DATA_EN), D1GRPH_ENABLE, D1GRPH_CONTROL (sets D1GRPH_DEPTH to 32bpp, D1GRPH_FORMAT to ARGB 8888, and D1GRPH_ARRAY_MODE to ARRAY_LINEAR_ALIGNED), D1GRPH_PRIMARY_SURFACE_ADDRESS, D1GRPH_PITCH, D1OVL_PITCH (for unknown reasons, the overlay is disabled) and an unknown register at ''GpuF0MMReg'':0x6914 (D2GRPH+0x0014?). As mentioned before, OSScreen also uses a set of registers 0x800 bytes along from the D1 registers (GRPH_ENABLE at ''GpuF0MMReg'':0x6900); which could be for Gamepad video output.

OSScreen uses the following D1 registers:

* D1CRTC_BLANK_CONTROL (sets D1CRTC_BLANK_DATA_EN)

* D1GRPH_ENABLE

* D1GRPH_CONTROL (sets D1GRPH_DEPTH to 32bpp, D1GRPH_FORMAT to ARGB 8888, and D1GRPH_ARRAY_MODE to ARRAY_LINEAR_ALIGNED)

* D1GRPH_PRIMARY_SURFACE_ADDRESS

* D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH (located at ''GpuF0MMReg'':0x6914 with its D2 counterpart at ''GpuF0MMReg'':0x6114 due to the R7xx D1 *_HIGH registers being located in the D2 block and vice versa)

* D1OVL_PITCH (for unknown reasons, the overlay is disabled)

== References ==

== References ==