Line 47:
Line 47:
|
|
*[[Hardware/Latte Registers|Latte Registers]]
*[[Hardware/Latte Registers|Latte Registers]]
−
**[[Hardware/OTP|OTP]]
*[[Hardware/AHMN controller|AHMN Controller]]
*[[Hardware/AHMN controller|AHMN Controller]]
*[[Hardware/Memory controller|Memory Controller]]
*[[Hardware/Memory controller|Memory Controller]]
Line 68:
Line 67:
*[[Hardware/Legacy|Legacy Interfaces]]
*[[Hardware/Legacy|Legacy Interfaces]]
|
|
+
*[[Hardware/eFuse|eFuse]]
*[[Hardware/SEEPROM|Serial EEPROM]]
*[[Hardware/SEEPROM|Serial EEPROM]]
*[[Hardware/TSOP NAND|TSOP NAND Flash]]
*[[Hardware/TSOP NAND|TSOP NAND Flash]]