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Line 343:
Line 343:
| 0x10 || FlushFPUContext
| 0x10 || FlushFPUContext
|-
|-
−| 0x11 || ReadRegister32Ex
+| 0x11 || [[#ReadRegister32Ex|ReadRegister32Ex]]
|-
|-
−| 0x12 || WriteRegister32Ex
+| 0x12 || [[#WriteRegister32Ex|WriteRegister32Ex]]
|-
|-
| 0x13 ||
| 0x13 ||
Line 363:
Line 363:
| 0x1A-0x1F || BadFastCall (jump to error on purpose)
| 0x1A-0x1F || BadFastCall (jump to error on purpose)
|}
|}
+
+=== ReadRegister32Ex ===
+Takes two u32s '''WhitelistIndex''' and '''RegisterIndex'''. Returns an u32 '''RegisterValue'''.
+
+Reads a hardware register from the following whitelist:
+ 0 // Invalid
+ 0xFD020068 // 2 registers at 0x0D000068 (HW_I2CIOPINTEN to HW_I2CIOPINTSTS)
+ 0xFD0100C0 // 1 registers at 0x0D0000C0 (HW_GPIOPPCOUT)
+ 0xFD04021C // 4 registers at 0x0D00021C
+ 0xFD040250 // 4 registers at 0x0D000250 (HW_I2CMCTRL to HW_I2CMDATARD)
+ 0xFD060520 // 6 registers at 0x0D000520 (LT_GPIOPPCOUT to LT_GPIOPPCINTEN)
+ 0xFD106400 // 16 registers at 0x0D006400
+ 0xFD046C00 // 4 registers at 0x0D006C00
+ 0xFD046E00 // 4 registers at 0x0D006E00
+ 0xFD0F6800 // 15 registers at 0x0D006800 (EXI0_CSR to EXI2_DATA)
+ 0 // Invalid
+ 0 // Invalid
+ 0 // Invalid
+ 0 // Invalid
+ 0 // Invalid
+ 0 // Invalid
+
+=== WriteRegister32Ex ===
+Takes three u32s '''WhitelistIndex''', '''RegisterIndex''' and '''RegisterValue'''. No output.
+
+Same as [[#ReadRegister32Ex|ReadRegister32Ex]], but for writing to a whitelisted hardware register instead.
== OSPlatformInfo ==
== OSPlatformInfo ==