Hardware/Espresso Registers
Some of the Wii U's hardware components are available to and primarily used by the Espresso; including the GX2, DSP and AX. These devices are mapped and available in Cafe OS userspace at 0xfc200000, used without the IOSU's involvement.
GX2 Registers
| GX2 Registers | |
| Access | |
|---|---|
| Espresso | Full |
| Starbuck | Full |
| Registers | |
| Base | 0x0c200000 |
| Length | 0x80000 |
| Access size | 32 bits |
| Byte order | Big Endian |
| IRQs | |
| Espresso | 2 |
See Also: GX2
The GX2 consists of an R7xx family Radeon. While documentation perfectly matching the card is yet to be found, several documents can be brought together to form a reasonable picture of the register layout.
Reverse-engineering has revealed that the GX2's MMIO registers (referred to as GpuF0MMReg in AMD's docs) are at 0x0c200000. The other MMIO locations (GpuF0Pcie, VGA_IO) are not known at this point.
- Register guide for a similar, but not identical, card. Covers 2D graphics, CRTCs, the memory controller, etc. Does not cover 3D. Addresses for registers starting with D1 are known to match the GX2 - this reference has been successfully used to set up a framebuffer without Cafe OS running. There's evidence of another display not mentioned in this document - see the Cafe OS section below.
- 3D register guide. Applies to the whole R7xx family, so there should be no differences for the GX2.[check] Has not been tried on hardware at time of writing.
- Conceptual document explaining how to actually use the 3D engine, shader pipelines, caches, etc. Names registers, but does not give addresses (readers should cross-reference the 3D Register Reference Guide)
Cafe OS
Cafe OS applies various APIs on top of the GX2's raw hardware registers - gx2.rpl and OSScreen.
OSScreen
OSScreen is the easier of the two to reverse-engineer, and reveals some unknowns in the hardware. For example, it uses the registers at GpuF0MMReg:0x6100 to set up one framebuffer - which matches the D1GRPH registers according to the RV630 Register Reference Guide (see chapter 2.7.1 - Primary Display Graphics Control Registers). However, the API also uses registers at GpuF0MMReg:0x7100 identically; suggesting the existence of another display controller at that location. The Register Reference Guide does not list any registers at that address, suggesting some major differences between the GX2 and the RV630.
OSScreen uses the following D1 registers: D1CRTC_BLANK_CONTROL (sets D1CRTC_BLANK_DATA_EN), D1GRPH_ENABLE, D1GRPH_CONTROL (sets D1GRPH_DEPTH to 32bpp, D1GRPH_FORMAT to ARGB 8888, and D1GRPH_ARRAY_MODE to ARRAY_LINEAR_ALIGNED), D1GRPH_PRIMARY_SURFACE_ADDRESS, D1GRPH_PITCH, D1OVL_PITCH (for unknown reasons, the overlay is disabled) and an unknown register at GpuF0MMReg:0x6914. As mentioned before, OSScreen also uses a set of registers 0x1000 bytes along from the D1 registers (GRPH_ENABLE at GpuF0MMReg:0x7100); which could be for Gamepad video output.