Line 20: |
Line 20: |
| {{rld|0x0d800010|32|HW_TIMER|[[Hardware/Starbuck Timer|CPU timer]]|drs=2}} | | {{rld|0x0d800010|32|HW_TIMER|[[Hardware/Starbuck Timer|CPU timer]]|drs=2}} |
| {{rld|0x0d800014|32|HW_ALARM}} | | {{rld|0x0d800014|32|HW_ALARM}} |
− | {{rld|0x0d800018|32|HW_VI1CFG}} | + | {{rld|0x0d800018|32|HW_VI1CFG|VI configuration}} |
− | {{rld|0x0d80001c|32|HW_VIDIM}} | + | {{rld|0x0d80001c|32|HW_VIDIM|VI dimmer}} |
− | {{rld|0x0d800024|32|HW_VISOLID}} | + | {{rld|0x0d800024|32|HW_VISOLID|VI solid color}} |
| {{rld|0x0d800030|32|HW_PPCIRQFLAG|[[Hardware/Latte_IRQ_Controller|Wood IRQs]]|drs=5}} | | {{rld|0x0d800030|32|HW_PPCIRQFLAG|[[Hardware/Latte_IRQ_Controller|Wood IRQs]]|drs=5}} |
| {{rld|0x0d800034|32|HW_PPCIRQMASK}} | | {{rld|0x0d800034|32|HW_PPCIRQMASK}} |
Line 109: |
Line 109: |
| {{rld|0x0d8001e4|32|HW_IOSTRCTRL1|I/O power strength control}} | | {{rld|0x0d8001e4|32|HW_IOSTRCTRL1|I/O power strength control}} |
| {{rld|0x0d8001e8|32|HW_CLKSTRCTRL|Clock power strength control}} | | {{rld|0x0d8001e8|32|HW_CLKSTRCTRL|Clock power strength control}} |
− | {{rld|0x0d8001ec|32|LT_OTPCMD|[[Hardware/OTP|OTP]]|drs=2}} | + | {{rld|0x0d8001ec|32|HW_OTPCMD|[[Hardware/OTP|OTP]]|drs=2}} |
− | {{rld|0x0d8001f0|32|LT_OTPDATA}} | + | {{rld|0x0d8001f0|32|HW_OTPDATA}} |
| {{rld|0x0d8001f4|32|HW_DBGCLK|External debugger|drs=4}} | | {{rld|0x0d8001f4|32|HW_DBGCLK|External debugger|drs=4}} |
| {{rld|0x0d8001f8|32|HW_OBSCLKOCTRL}} | | {{rld|0x0d8001f8|32|HW_OBSCLKOCTRL}} |