Changes

438 bytes removed ,  23:03, 17 May 2023
Fix redundancy
Line 10: Line 10:  
}}
 
}}
   āˆ’
The Latte chipset includes two groups of general purpose I/O lines with interrupt capability: one common to Wood and Latte hardware (ALL) and another exclusively available to Latte (LT). Four sets of registers are provided (two for each group), and the Espresso only has access to two sets. These sets access a configurable subset of the IO pins, which the Starbuck can select.
+
The Latte chipset includes two groups of general purpose I/O lines with interrupt capability: one common to Wood and Latte hardware (ALL) and another exclusively available to Latte (LATTE). Four sets of registers are provided (two for each group), and the Espresso only has access to two sets. These sets access a configurable subset of the IO pins, which the Starbuck can select.
   āˆ’
== Pin connections ==
+
== Pins ==
 
{| class="wikitable"
 
{| class="wikitable"
 
|-  
 
|-  
Line 18: Line 18:  
! Group
 
! Group
 
! Direction
 
! Direction
āˆ’
! Connection
   
! Description
 
! Description
 
|-
 
|-
āˆ’
| 0 || ALL || IN || RTCSysInt || Power button input.
+
| 0 || ALL || IN || RTCSysInt (power button input)
 
|-
 
|-
āˆ’
| 0 || ALL || OUT || ToucanSelect || [[Hardware/Toucan|Toucan]] select (devkit only).
+
| 0 || ALL || OUT || ToucanSelect ([[Hardware/Toucan|Toucan]] select, devkit only)
 
|-
 
|-
āˆ’
| 0 || LT || OUT || FanSpeed || Fan speed.
+
| 0 || LATTE || OUT || FanSpeed
 
|-
 
|-
āˆ’
| 1 || ALL || OUT || DWiFiMode || DWiFi mode.
+
| 1 || ALL || OUT || DWiFiMode
 
|-
 
|-
āˆ’
| 1 || LT || IN || SMCI2CClock || SMC IĀ²C Clock.
+
| 1 || LATTE || IN || SMCI2CClock
 
|-
 
|-
āˆ’
| 2 || ALL || OUT || FanPower || Fan power, active high.
+
| 2 || ALL || OUT || FanPower
 
|-
 
|-
āˆ’
| 2 || LT || IN || SMCI2CData || SMC IĀ²C Data.
+
| 2 || LATTE || IN || SMCI2CData
 
|-
 
|-
āˆ’
| 3 || ALL || OUT || DCDCPwrCnt || DC/DC converter power, active high.
+
| 3 || ALL || OUT || DCDCPwrCnt (DC/DC converter power, active high)
 
|-
 
|-
āˆ’
| 3 || ALL || OUT || CCRIO3 || DRH reset related (Cortado only, equiv to CCRHReset?).
+
| 3 || ALL || OUT || CCRIO3 (DRH reset related, Cortado only, equiv to CCRHReset?)
 
|-
 
|-
āˆ’
| 3 || LT || OUT || DCDCPwrCnt2 || DC/DC converter power, active high.
+
| 3 || LATTE || OUT || DCDCPwrCnt2 (DC/DC converter power, active high)
 
|-
 
|-
āˆ’
| 4 || ALL || OUT || DISpinUp || DI spin up (devkit only).
+
| 4 || ALL || OUT || DISpinUp (devkit only)
 
|-
 
|-
āˆ’
| 4 || LT || IN || AVInterrupt || A/V encoder interrupt (from Espresso).
+
| 4 || LATTE || IN || AVInterrupt (A/V encoder interrupt from Espresso)
 
|-
 
|-
āˆ’
| 5 || ALL || OUT || ESP10WorkAround || Unknown.
+
| 5 || ALL || OUT || ESP10WorkAround
 
|-
 
|-
āˆ’
| 5 || ALL || OUT || SlotLED || Slot LED (devkit only).
+
| 5 || ALL || OUT || SlotLED (devkit only)
 
|-
 
|-
āˆ’
| 5 || LT || OUT || CCRHFWCtrl || CCRH firmware control (devkit only).
+
| 5 || LATTE || OUT || CCRHFWCtrl (devkit only)
 
|-
 
|-
āˆ’
| 6 || ALL || UNK || UNKNOWN || Unknown.
+
| 6 || ALL || UNK || Unknown
 
|-
 
|-
āˆ’
| 6 || LT || OUT || AVReset || A/V encoder reset (from Espresso).
+
| 6 || LATTE || OUT || AVReset (A/V encoder reset from Espresso)
 
|-
 
|-
āˆ’
| 7 || ALL || UNK || UNKNOWN || Unknown.
+
| 7 || ALL || UNK || Unknown
 
|-
 
|-
āˆ’
| 8 || ALL || OUT || PADPD || GamePad power state.
+
| 8 || ALL || OUT || PADPD (GamePad power state)
 
|-
 
|-
āˆ’
| 9 || ALL || I/O || NDEV_LED || Development unit's LED.
+
| 9 || ALL || I/O || NDEV_LED (devkit only)
 
|-
 
|-
āˆ’
| 10 || ALL || OUT || EEPROM_CS || SEEPROM Chip Select.
+
| 10 || ALL || OUT || EEPROM_CS (SEEPROM chip select)
 
|-
 
|-
āˆ’
| 11 || ALL || OUT || EEPROM_SK || SEEPROM Clock.
+
| 11 || ALL || OUT || EEPROM_SK (SEEPROM clock)
 
|-
 
|-
āˆ’
| 12 || ALL || OUT || EEPROM_DO || Data to SEEPROM.
+
| 12 || ALL || OUT || EEPROM_DO (data to SEEPROM)
 
|-
 
|-
āˆ’
| 13 || ALL || IN || EEPROM_DI || Data from SEEPROM.
+
| 13 || ALL || IN || EEPROM_DI (data from SEEPROM)
 
|-
 
|-
āˆ’
| 14 || ALL || OUT || AV0I2CClock || A/V Encoder (#0) IĀ²C Clock.
+
| 14 || ALL || OUT || AV0I2CClock (A/V Encoder #0 IĀ²C Clock)
 
|-
 
|-
āˆ’
| 15 || ALL || OUT || AV0I2CData || A/V Encoder (#0) IĀ²C Data.
+
| 15 || ALL || OUT || AV0I2CData (A/V Encoder #0 IĀ²C Data)
 
|-
 
|-
āˆ’
| 16 || ALL || I/O || NDEV_LED || Development unit's LED (debug testpoint TP50).
+
| 16 || ALL || I/O || NDEV_LED (devkit only, debug testpoint TP50)
 
|-
 
|-
āˆ’
| 17 || ALL || I/O || NDEV_LED || Development unit's LED (debug testpoint TP51).
+
| 17 || ALL || I/O || NDEV_LED (devkit only, debug testpoint TP51)
 
|-
 
|-
āˆ’
| 18 || ALL || I/O || NDEV_LED || Development unit's LED (debug testpoint TP52).
+
| 18 || ALL || I/O || NDEV_LED (devkit only, debug testpoint TP52)
 
|-
 
|-
āˆ’
| 19 || ALL || I/O || NDEV_LED || Development unit's LED (debug testpoint TP53).
+
| 19 || ALL || I/O || NDEV_LED (devkit only, debug testpoint TP53)
 
|-
 
|-
āˆ’
| 20 || ALL || I/O || NDEV_LED || Development unit's LED (debug testpoint TP55).
+
| 20 || ALL || I/O || NDEV_LED (devkit only, debug testpoint TP55)
 
|-
 
|-
āˆ’
| 21 || ALL || I/O || NDEV_LED || Development unit's LED (debug testpoint TP54).
+
| 21 || ALL || I/O || NDEV_LED (devkit only, debug testpoint TP54)
 
|-
 
|-
āˆ’
| 22 || ALL || I/O || NDEV_LED || Development unit's LED (debug testpoint TP48).
+
| 22 || ALL || I/O || NDEV_LED (devkit only, debug testpoint TP48)
 
|-
 
|-
āˆ’
| 23 || ALL || I/O || NDEV_LED || Development unit's LED (debug testpoint TP49).
+
| 23 || ALL || I/O || NDEV_LED (devkit only, debug testpoint TP49)
 
|-
 
|-
āˆ’
| 24 || ALL || OUT || AV1I2CClock || A/V Encoder (#1) IĀ²C Clock.
+
| 24 || ALL || OUT || AV1I2CClock (A/V Encoder #1 IĀ²C Clock)
 
|-
 
|-
āˆ’
| 25 || ALL || OUT || AV1I2CData || A/V Encoder (#1) IĀ²C Data.
+
| 25 || ALL || OUT || AV1I2CData (A/V Encoder #1 IĀ²C Data)
 
|-
 
|-
āˆ’
| 26 || ALL || OUT || MuteLamp || Unknown.
+
| 26 || ALL || OUT || MuteLamp
 
|-
 
|-
āˆ’
| 27 || ALL || OUT || BlueToothMode || BlueTooth mode.
+
| 27 || ALL || OUT || BlueToothMode
 
|-
 
|-
āˆ’
| 28 || ALL || OUT || CCRHReset || CCRH reset.
+
| 28 || ALL || OUT || CCRHReset
 
|-
 
|-
āˆ’
| 29 || ALL || OUT || WiFiMode || WiFi mode.
+
| 29 || ALL || OUT || WiFiMode
 
|-
 
|-
āˆ’
| 30 || ALL || OUT || SDC0S0Power || SD card (slot 0) power. Driven low before boot0 attempts to read a signed boot1 image from the SD card.
+
| 30 || ALL || OUT || SDC0S0Power (SD card power, driven low before boot0 attempts to read a signed boot1 image from the SD card)
 
|-
 
|-
āˆ’
| 31 || ALL || I/O || NDEV_LED || Development unit's LED.
+
| 31 || ALL || I/O || NDEV_LED (devkit only)
 
|}
 
|}