Changes

Line 47: Line 47:  
| 7 || ALL || SD0 ({{hw|SD Host Controller}})
 
| 7 || ALL || SD0 ({{hw|SD Host Controller}})
 
|-
 
|-
| 7 || LATTE || Unknown
+
| 7 || LATTE || BMD2
 
|-
 
|-
 
| 8 || ALL || SD1 ({{hw|802.11 Wireless}})
 
| 8 || ALL || SD1 ({{hw|802.11 Wireless}})
Line 53: Line 53:  
| 8 || LATTE || AES1 ({{hw|AES Engine}} for AESS)
 
| 8 || LATTE || AES1 ({{hw|AES Engine}} for AESS)
 
|-
 
|-
| 9 || ALL || Reserved
+
| 9 || ALL || BFM
 
|-
 
|-
 
| 9 || LATTE || SHA1 ({{hw|SHA-1 Engine}} for SHAS-1)
 
| 9 || LATTE || SHA1 ({{hw|SHA-1 Engine}} for SHAS-1)
Line 59: Line 59:  
| 10 || ALL || GPIPPC ({{hw|Latte GPIOs}} for Espresso)
 
| 10 || ALL || GPIPPC ({{hw|Latte GPIOs}} for Espresso)
 
|-
 
|-
| 10 || LATTE || Unknown
+
| 10 || LATTE || AI2
 
|-
 
|-
 
| 11 || ALL || GPIIOP ({{hw|Latte GPIOs}} for Starbuck)
 
| 11 || ALL || GPIIOP ({{hw|Latte GPIOs}} for Starbuck)
Line 65: Line 65:  
| 11 || LATTE || GPU7_GC
 
| 11 || LATTE || GPU7_GC
 
|-
 
|-
| 12 || ALL || DBGINT
+
| 12 || ALL || AHBDBG
 
|-
 
|-
 
| 12 || LATTE || IOP2X
 
| 12 || LATTE || IOP2X
Line 79: Line 79:  
| 15 || ALL || SYSRSTB
 
| 15 || ALL || SYSRSTB
 
|-
 
|-
| 15 || LATTE || Reserved
+
| 15 || LATTE || PAD0
 
|-
 
|-
 
| 16 || ALL || VIVSYNC
 
| 16 || ALL || VIVSYNC
Line 85: Line 85:  
| 16 || LATTE || Reserved
 
| 16 || LATTE || Reserved
 
|-
 
|-
| 17 || ALL || Power button
+
| 17 || ALL || RSW
 
|-
 
|-
 
| 17 || LATTE || Reserved
 
| 17 || LATTE || Reserved
Line 93: Line 93:  
| 18 || LATTE || Reserved
 
| 18 || LATTE || Reserved
 
|-
 
|-
| 19 || ALL || Reserved
+
| 19 || ALL || SI
 
|-
 
|-
 
| 19 || LATTE || Reserved
 
| 19 || LATTE || Reserved
Line 101: Line 101:  
| 20 || LATTE || Reserved
 
| 20 || LATTE || Reserved
 
|-
 
|-
| 21 || ALL || Reserved
+
| 21 || ALL || AI
 
|-
 
|-
 
| 21 || LATTE || Reserved
 
| 21 || LATTE || Reserved
 
|-
 
|-
| 22 || ALL || Reserved
+
| 22 || ALL || DSP
 
|-
 
|-
 
| 22 || LATTE || Reserved
 
| 22 || LATTE || Reserved
 
|-
 
|-
| 23 || ALL || Reserved
+
| 23 || ALL || MEM
 
|-
 
|-
 
| 23 || LATTE || Reserved
 
| 23 || LATTE || Reserved
 
|-
 
|-
| 24 || ALL || Reserved
+
| 24 || ALL || VI
 
|-
 
|-
 
| 24 || LATTE || Reserved
 
| 24 || LATTE || Reserved
 
|-
 
|-
| 25 || ALL || Reserved
+
| 25 || ALL || PEINT0
 
|-
 
|-
 
| 25 || LATTE || Reserved
 
| 25 || LATTE || Reserved
 
|-
 
|-
| 26 || ALL || Reserved
+
| 26 || ALL || PEINT1
 
|-
 
|-
 
| 26 || LATTE || IPC_PPC2 (Espresso CPU2)
 
| 26 || LATTE || IPC_PPC2 (Espresso CPU2)
 
|-
 
|-
| 27 || ALL || Reserved
+
| 27 || ALL || CP
 
|-
 
|-
 
| 27 || LATTE || IPC_IOP2 (Starbuck CPU2)
 
| 27 || LATTE || IPC_IOP2 (Starbuck CPU2)
 
|-
 
|-
| 28 || ALL || {{hw|SATA Controller}} (DBGINT only?)
+
| 28 || ALL || DBG
 
|-
 
|-
 
| 28 || LATTE || IPC_PPC1 (Espresso CPU1)
 
| 28 || LATTE || IPC_PPC1 (Espresso CPU1)
 
|-
 
|-
| 29 || ALL || Reserved
+
| 29 || ALL || SD
 
|-
 
|-
 
| 29 || LATTE || IPC_IOP1 (Starbuck CPU1)
 
| 29 || LATTE || IPC_IOP1 (Starbuck CPU1)