Hardware/External interface
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External Interface
External Interface | |
Access | |
---|---|
Espresso | Partial |
Starbuck | Full |
Registers | |
Base | 0x0d806800 |
Length | 0x400 |
Access size | 32 bits |
Byte order | Big Endian |
IRQs | |
Espresso | ??? |
Latte | ??? |
For compatibility purposes, the Wii U implements the External Interface similarly to the GameCube and the Wii. On a regular retail Wii U, the RTC is the only device registered on the EXI bus (channel 0, device 1). An additional device called NESCAFE (part of the debug CORTADO package) was presumably used in the past for debugging purposes and used to sit on channel 0 as device 2.
This bus is accessible externally via the following test points:
- TP101 - CLK
- TP176 - MISO (Device out, Wii U in)
- Test point between TP100 and TP176 - MOSI (Device in, Wii U out)
Register List
EXI Interface | |||
---|---|---|---|
Address | Bits | Name | Description |
0x0d806800 | 32 | EXI0_CSR | EXI Channel 0 Parameter Register |
0x0d806804 | 32 | EXI0_MAR | EXI Channel 0 DMA Start Address |
0x0d806808 | 32 | EXI0_LENGTH | EXI Channel 0 DMA Transfer Length |
0x0d80680c | 32 | EXI0_CR | EXI Channel 0 Control Register |
0x0d806810 | 32 | EXI0_DATA | EXI Channel 0 Immediate Data |
0x0d806814 | 32 | EXI1_CSR | EXI Channel 1 Parameter Register |
0x0d806818 | 32 | EXI1_MAR | EXI Channel 1 DMA Start Address |
0x0d80681c | 32 | EXI1_LENGTH | EXI Channel 1 DMA Transfer Length |
0x0d806820 | 32 | EXI1_CR | EXI Channel 1 Control Register |
0x0d806824 | 32 | EXI1_DATA | EXI Channel 1 Immediate Data |
0x0d806828 | 32 | EXI2_CSR | EXI Channel 2 Parameter Register |
0x0d80682c | 32 | EXI2_MAR | EXI Channel 2 DMA Start Address |
0x0d806830 | 32 | EXI2_LENGTH | EXI Channel 2 DMA Transfer Length |
0x0d806834 | 32 | EXI2_CR | EXI Channel 2 Control Register |
0x0d806838 | 32 | EXI2_DATA | EXI Channel 2 Immediate Data |
Register Details
EXIx_CR (0x0d80680c/0x0d806820/0x0d806834) | |
310 | |
Access | W |
EXIx_DATA (0x0d806810/0x0d806824/0x0d806838) | |
310 | |
Access | R/W |
When IOSU sends data to the device, it:
- Writes the data into EXI_DATA
- Writes 0x35 into EXI_CR
- Waits for IRQ #20
When IOSU reads data from the device, it:
- Writes 0x31 into EXI_CR
- Waits for IRQ #20
- Reads the data from EXI_DATA