Hardware/SMC

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General

The Wii U added a new chip to assist with power management alongside the RTC, labeled "SMC". The SMC is responsible for managing disc drive power/eject, power LED patterns, wireless resets, regulator enable/PGOOD monitoring, and possibly other unknown functionality.

Communication

SMC resides as device ID 0x50 on I2C bus 3. It communicates at 5kHz in IOS and 10KHz in Cafe2Wii?

Registers

SMC has two types of registers: Read/write and command-based. Read/write registers operate by having the register number written (1 byte), followed by either another written byte, or a 1 byte read. Command-based registers perform their action just by writing the register number (1 byte). When attempting to read a command-based register, it will read as 0xFF.

Index Type Description
0x00 Command ODD On
0x01 Command ODD Off
0x02 Command ODD Eject Request
0x8D Read/Write? 00 on power on?
0x8E Read/Write? 00 on power on?
0x8F Read/Write? 00 on power on?
0x10 Command ON LED on
0x11 Command ON LED on?
0x12 Command ON LED off
0x13 Command ON LED pulse
0x14 Command CC LED off
0x15 Command CC LED on
0x16 Command CC LED pulse
0x17 ? ?
0x18 ? ?
0x19 ? ?
0x1A ? ?
0x1B ? ?
0x1C ? ?
0x1D ? ?
0x1E Command OFF LED on
0x1F Command OFF LED pulse
0x20 Command bt_rst
0x21 Command wifi_rst
0x22 Command drc_wifi_rst
0x30~0x32 Read/Write TimerCounter
0x40 Read ProgramRevision (val: 0xC5)
0x41 Read SystemEventFlag
0x42 Read ?, read-only (val: 0x0B, 0x0A?)
0x43 Read/Write USB Power (bitmask; front USB: 0x1, rear USB: 0x2)
0x44 Read/Write NotificationLED
0x45 Read/Write PowerFailureState, writable (val: 0x08)
0x46 Read/Write WifiRstCtrl (val: 0x00)
0x47 Read ? not writable (val: 0xFF)
0x48 Read ? not writable (val: 0x0F)
0x49 Read ? (val: 0x4000000; needs ProgramRevision > 0xD3?)
0x60~0x6F Read/Write SystemError, 0x60=LAPSSetting. Values must be written from largest to smallest address for values to be set.
0x70 Read UnkDataValid (0x01 when UnkData is valid, else 0x00)
0x71 Read/Write? Blinks the drive LED/reset on read? (I2C reads 0xFF briefly).
0x72 Read/Write Seems to affect whether UnkDataValid is set for addrs 0x4~0x81. bit1 fills in UnkData with 0x5, ((reg & 0xF0) > 0x80) returns UnkDataValid to 0? (val: 0x00)
0x73 Read/Write UnkAddrHi? Changes to 0x10 when UnkAddrHi is less than 0x10. (val: 0x00)
0x74 Read/Write UnkAddrLo? Changes UnkData and UnkDataValid. (val: 0x00)
0x75 Read ? (val: 0x00)
0x76 Read UnkData. Changes to 0x5 then 0xf1 when 0x74 is written to 0x00 twice.
0x80~0xFF Read/Write scratch mem? (val: 0x00)

SystemEventFlag

Bitmask Name
0x40 SMC_POWER_BUTTON
0x20 SMC_EJECT_BUTTON
0x10 SMC_DISK_INSERT
0x08 SMC_TIMER
0x04 SMC_BT_IRQ
0x02 SMC_WAKE0
0x01 SMC_WAKE1

NotificationLED

Value Name
0x80 ?
0x40 ?
0x20 Blue LED en
0x10 Blue LED pulse en
0x08 Red LED en
0x04 Red LED pulse en
0x02 Yellow LED en
0x01 Yellow LED pulse en