Hardware/Processor interface: Difference between revisions

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m Register List: Imported from Wiibrew IPC page, forgot to change "IPC" part
IRQ Sources: Take probable IRQ numbers from http://pastebin.com/mAgkL9eW
Line 12: Line 12:
! Description
! Description
|-
|-
| ||  
|0 || Error
|-
|1 || {{hw|DSP}} (all DSP IRQs)
|-
|2 || {{hw|GX2}}
|-
|3 || GPIPPC (?)
|-
|4 || {{hw|I2C}}
|-
|5 || {{hw|Audio Interface}} (TV)
|-
|6 || {{hw|Audio Interface}} (Gamepad)
|-
|7 || ACC (?)
|-
|8 || {{hw|DSP}} (again?)
|-
|9 || {{hw|IPC}} (CPU0)
|-
|10 || {{hw|IPC}} (CPU1)
|-
|11 || {{hw|IPC}} (CPU2)
|-
|12 || {{hw|Latte IRQs}}
|}
|}



Revision as of 01:31, 21 August 2015

Processor interface
Access
EspressoFull
StarbuckNone
Registers
Base0x0c000000
Length0xc0000
Access size32 bits
Byte orderBig Endian
This box: view  talk  edit


IRQ Sources

IRQ Description
0 Error
1 DSP (all DSP IRQs)
2 GX2
3 GPIPPC (?)
4 I2C
5 Audio Interface (TV)
6 Audio Interface (Gamepad)
7 ACC (?)
8 DSP (again?)
9 IPC (CPU0)
10 IPC (CPU1)
11 IPC (CPU2)
12 Latte IRQs

Register List

Processor Interface
Address Bits Name Description
0x0c000000 32 PI_INTSR_GLOBAL Globally-triggered IRQs
0x0c000004 32 PI_INTMR_GLOBAL Globally-allowed IRQs
0x0c000078 32 PI_INTSR_CPU0 Triggered IRQs for CPU0
0x0c00007c 32 PI_INTMR_CPU0 Allowed IRQs for CPU0
0x0c000080 32 PI_INTSR_CPU1 Triggered IRQs for CPU1
0x0c000084 32 PI_INTMR_CPU1 Allowed IRQs for CPU1
0x0c000088 32 PI_INTSR_CPU2 Triggered IRQs for CPU2
0x0c00008c 32 PI_INTMR_CPU2 Allowed IRQs for CPU2

Register Details