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Hardware/Processor interface (view source)
Revision as of 04:23, 21 August 2015
, 04:23, 21 August 2015→IRQ Sources: Add masks for IRQs
Line 12:
Line 12:
! Description
! Description
! Connection
! Connection
+! Mask
|-
|-
−|0 || Error || Processor Interface
+|0 || Error || Processor Interface || 0x1
|-
|-
−|1 || {{hw|DSP}} (all DSP IRQs) || Processor Interface
+|1 || {{hw|DSP}} (all DSP IRQs) || Processor Interface || 0x40
|-
|-
−|2 || {{hw|GX2}} || Processor Interface (Latte)
+|2 || {{hw|GX2}} || Processor Interface (Latte) || 0x800000
|-
|-
−|3 || GPIPPC (?) || AHB
+|3 || GPIPPC (?) || AHB || 0x400
|-
|-
−|4 || {{hw|I2C}} || AHB (Latte)
+|4 || {{hw|I2C}} || AHB (Latte) || 0x2000
|-
|-
−|5 || {{hw|Audio Interface}} (TV) || {{hw|DSP}}
+|5 || {{hw|Audio Interface}} (TV) || {{hw|DSP}} || 0x8
|-
|-
−|6 || {{hw|Audio Interface}} (Gamepad) || {{hw|DSP}} (Latte)
+|6 || {{hw|Audio Interface}} (Gamepad) || {{hw|DSP}} (Latte) || 0x1000
|-
|-
−|7 || DSP ARAM || {{hw|DSP}}
+|7 || DSP ARAM || {{hw|DSP}} || 0x20
|-
|-
−|8 || DSP DMA || {{hw|DSP}}
+|8 || DSP DMA || {{hw|DSP}} || 0x80
|-
|-
−|9 || {{hw|IPC}} (CPU0) || AHB (Latte)
+|9 || {{hw|IPC}} (CPU0) || AHB (Latte) || 0x40000000
|-
|-
−|10 || {{hw|IPC}} (CPU1) || AHB (Latte)
+|10 || {{hw|IPC}} (CPU1) || AHB (Latte) || 0x10000000
|-
|-
−|11 || {{hw|IPC}} (CPU2) || AHB (Latte)
+|11 || {{hw|IPC}} (CPU2) || AHB (Latte) || 0x4000000
|-
|-
−|12 || {{hw|Latte IRQs}} || Processor Interface (Latte)
+|12 || {{hw|Latte IRQs}} || Processor Interface (Latte) || 0x1000000
|}
|}