108
edits
Changes
m
HW to LT
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−
−
== General Registers ==
== General Registers ==
−{{reg32 | HW_OTP_COMMAND | addr = 0x0d8001ec | hifields = 2 | lofields = 2 |
+{{reg32 | LT_OTP_COMMAND | addr = 0x0d8001ec | hifields = 2 | lofields = 2 |
|1|15|
|1|15|
|R/W|U|
|R/W|U|
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Line 26:
}}
}}
{{regdesc
{{regdesc
−|RD|Set to one to execute a read command. If clear, then the data in HW_OTP_DATA is unchanged.
+|RD|Set to one to execute a read command. If clear, then the data in LT_OTP_DATA is unchanged.
|ADDR|Word address to read. 0x00 to 0x1F (32 4byte words) ORed with the bank's number (0x000 to 0x700).
|ADDR|Word address to read. 0x00 to 0x1F (32 4byte words) ORed with the bank's number (0x000 to 0x700).
}}
}}
This register contains the command sent to the OTP. It is unknown whether is register is also used during the factory process to program the OTP.
This register contains the command sent to the OTP. It is unknown whether is register is also used during the factory process to program the OTP.
----
----
−{{regsimple|HW_OTP_DATA|addr=0x0d8001f0|bits=32|access=R}}
+{{regsimple|LT_OTP_DATA|addr=0x0d8001f0|bits=32|access=R}}
−This register contains the output data for the last issued OTP read command. The execution of a read operation via the HW_OTP_COMMAND register immediately changes this register without any delay.
+This register contains the output data for the last issued OTP read command. The execution of a read operation via the LT_OTP_COMMAND register immediately changes this register without any delay.
== IOSU ==
== IOSU ==
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word_addr = word_addr | word_offset;
word_addr = word_addr | word_offset;
*(u32*)0x0D8001EC = word_addr; // HW_OTPCMD
+ *(u32*)0x0D8001EC = word_addr; // LT_OTPCMD
// Keep checking the read flag.
// Keep checking the read flag.
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break;
break;
*(u32*)(out_buf + step) = *(u32*)0x0D8001F0; // HW_OTPDATA
+ *(u32*)(out_buf + step) = *(u32*)0x0D8001F0; // LT_OTPDATA
step += 4;
step += 4;