In memory of Ben “bushing” Byer, who passed away on Monday, February 8th, 2016.

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1,107 bytes added ,  06:30, 13 December 2015
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*0xEFF00000 - 0xEFF08000 '''Unknown'''
 
*0xEFF00000 - 0xEFF08000 '''Unknown'''
 
*0xFFFF0000 - 0xFFFFFFFF '''Kernel SRAM'''
 
*0xFFFF0000 - 0xFFFFFFFF '''Kernel SRAM'''
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The Starbuck MMU itself only has R/W permissions for data/instruction memory access, no XN. However, there is XN implemented via separate hardware registers at 0x0d8b0XXX. The register relative-offset is calculated with the physaddr of the memory being protected. Each u32 register corresponds to a different block of physical memory. Among other things, this controls whether the ARM is allowed to access the memory for instruction-access, and in what ARM-mode(userland/privileged) the instruction-access is permitted.
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Hence, userland .text is ''only'' executable from userland. From userland, the ''only'' executable memory is the process .text. In privileged-mode, the ''only'' executable memory is the main kernel .text(0x08120000) and 0xffff0000(the latter is also RWX).
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==Exception Handling==
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The data-abort and prefetch-abort exception handlers will first check whether a certain flag is clear(flagsfield & (1<<PID)). When that bit is clear and the PID is <=13(highest IOSU PID value that exists), it will just return from the function then do a context-switch. Otherwise, iosPanic() is called.
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