Line 76: |
Line 76: |
| | MMIO | | | MMIO |
| | [[:Hardware/NAND_Interface|NAND registers]] | | | [[:Hardware/NAND_Interface|NAND registers]] |
| + | |- |
| + | | 0x0D020000 |
| + | | 0x0D02FFFF |
| + | | 0x10000 |
| + | | MMIO |
| + | | [[:Hardware/AES_Engine|AES registers]] (has a virtual mapping at 0x0D820000) |
| + | |- |
| + | | 0x0D030000 |
| + | | 0x0D03FFFF |
| + | | 0x10000 |
| + | | MMIO |
| + | | [[:Hardware/SHA-1_Engine|SHA-1 registers]] (has a virtual mapping at 0x0D830000) |
| |- | | |- |
| | 0x0D040000 | | | 0x0D040000 |
Line 148: |
Line 160: |
| | MMIO | | | MMIO |
| | [[:Hardware/SATA_Controller|SATA registers]] | | | [[:Hardware/SATA_Controller|SATA registers]] |
| + | |- |
| + | | 0x0D180000 |
| + | | 0x0D18FFFF |
| + | | 0x10000 |
| + | | MMIO |
| + | | [[:Hardware/AES_Engine|AESS registers]] (has a virtual mapping at 0x0D980000) |
| + | |- |
| + | | 0x0D190000 |
| + | | 0x0D19FFFF |
| + | | 0x10000 |
| + | | MMIO |
| + | | [[:Hardware/SHA-1_Engine|SHAS-1 registers]] (has a virtual mapping at 0x0D990000) |
| |- | | |- |
| | 0x0D400000 | | | 0x0D400000 |
Line 153: |
Line 177: |
| | 0x10000 | | | 0x10000 |
| | SRAM1 | | | SRAM1 |
− | | BOOT1 (mirrored in 0xFFF00000) | + | | [[boot1]] (mirrored in 0xFFF00000) |
| |- | | |- |
| | 0x0D410000 | | | 0x0D410000 |
Line 159: |
Line 183: |
| | 0x10000 | | | 0x10000 |
| | SRAM0 | | | SRAM0 |
− | | BOOT0 (mirrored in 0xFFFF0000) | + | | [[:boot0]] (mirrored in 0xFFFF0000) |
| |- | | |- |
| | 0x0D800000 | | | 0x0D800000 |
Line 166: |
Line 190: |
| | MMIO | | | MMIO |
| | [[:Hardware/Latte_Registers|Latte registers]] | | | [[:Hardware/Latte_Registers|Latte registers]] |
− | |-
| |
− | | 0x0D820000
| |
− | | 0x0D82FFFF
| |
− | | 0x10000
| |
− | | MMIO
| |
− | | [[:Hardware/AES_Engine|AES registers]] (has a virtual mapping at 0x0D020000)
| |
− | |-
| |
− | | 0x0D830000
| |
− | | 0x0D83FFFF
| |
− | | 0x10000
| |
− | | MMIO
| |
− | | [[:Hardware/SHA-1_Engine|SHA-1 registers]] (has a virtual mapping at 0x0D030000)
| |
| |- | | |- |
| | 0x0D8B0800 | | | 0x0D8B0800 |
Line 190: |
Line 202: |
| | MMIO | | | MMIO |
| | [[:Hardware/Memory_Controller|Memory Controller registers]] | | | [[:Hardware/Memory_Controller|Memory Controller registers]] |
− | |-
| |
− | | 0x0D980000
| |
− | | 0x0D98FFFF
| |
− | | 0x10000
| |
− | | MMIO
| |
− | | [[:Hardware/AES_Engine|AESS registers]] (has a virtual mapping at 0x0D180000)
| |
− | |-
| |
− | | 0x0D990000
| |
− | | 0x0D99FFFF
| |
− | | 0x10000
| |
− | | MMIO
| |
− | | [[:Hardware/SHA-1_Engine|SHAS-1 registers]] (has a virtual mapping at 0x0D190000)
| |
| |- | | |- |
| | 0x10000000 | | | 0x10000000 |