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Hardware/SATA controller (view source)
Revision as of 22:41, 16 October 2017
, 22:41, 16 October 2017no edit summary
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In terms of hardware registers; the controller lines up with the specification starting at address 0x0D160400; that is; the first Generic Host Control register (Host Capabilities) resides at 0x0D160400. On a retail console, this register reads out 0x7720FF81.
In terms of hardware registers; the controller lines up with the specification starting at address 0x0D160400; that is; the first Generic Host Control register (Host Capabilities) resides at 0x0D160400. On a retail console, this register reads out 0x7720FF81.
+
+== Registers ==
+* The generic host control registers start at 0x0D160400.
+* The port registers start at 0x0D160500.
+
+== ATAPI commands ==
+Besides commands defined in the ATAPI specification, the Wii U also seems to have some custom commands.
+
+=== 0xF0 - ATAPI_CF_REQUEST_DRIVE_ID_CMD ===
+
+=== 0xF1 - ATAPI_CF_AUTHENTICATE_CMD ===
+
+=== 0xF2 - ATAPI_CF_START_STOP_UNIT_CMD ===
+
+=== 0xF3 - ATAPI_CF_READ_CMD ===
+
+=== 0xF4 - ATAPI_CF_TEST_UNIT_READY_CMD ===
+
+=== 0xF5 - ATAPI_CF_INQUIRY_CMD ===
+{| class="wikitable"
+|-
+! Offset
+! Size
+! Description
+|-
+| 0x00
+| 0x02
+| Unknown
+|-
+| 0x02
+| 0x01
+| Vendor
+|-
+| 0x03
+| 0x01
+| Device
+|-
+| 0x04
+| 0x1C
+| Unknown
+|-
+| 0x20
+| -
+| End
+|}
+
+=== 0xFB - ATAPI_CF_FREC_READ_CMD ===
== See Also ==
== See Also ==
[https://www.intel.com/content/dam/www/public/us/en/documents/technical-specifications/serial-ata-ahci-tech-proposal-rev1_3_1.pdf AHCI spec]
[https://www.intel.com/content/dam/www/public/us/en/documents/technical-specifications/serial-ata-ahci-tech-proposal-rev1_3_1.pdf AHCI spec]