In memory of Ben “bushing” Byer, who passed away on Monday, February 8th, 2016.

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Hardware/Latte registers (view source)

Revision as of 23:14, 9 April 2023

52 bytes added ,  23:14, 9 April 2023
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Line 18: Line 18:  
{{rld|0x0d800008|32|HW_IPC_ARMMSG}}
 
{{rld|0x0d800008|32|HW_IPC_ARMMSG}}
 
{{rld|0x0d80000c|32|HW_IPC_ARMCTRL}}
 
{{rld|0x0d80000c|32|HW_IPC_ARMCTRL}}
−
{{rld|0x0d800010|32|HW_TIMER|[[Hardware/Starbuck Timer|CPU timer]]|drs=2}}
+
{{rld|0x0d800010|32|HW_TIMER|CPU timer|drs=2}}
 
{{rld|0x0d800014|32|HW_ALARM}}
 
{{rld|0x0d800014|32|HW_ALARM}}
 
{{rld|0x0d800018|32|HW_VI1CFG|VI configuration}}
 
{{rld|0x0d800018|32|HW_VI1CFG|VI configuration}}
Line 39: Line 39:  
{{rld|0x0d800068|32|HW_I2CIOPINTEN|[[Hardware/Latte I²C|IOP I²C]] (used for the AV encoder)|drs=2}}
 
{{rld|0x0d800068|32|HW_I2CIOPINTEN|[[Hardware/Latte I²C|IOP I²C]] (used for the AV encoder)|drs=2}}
 
{{rld|0x0d80006c|32|HW_I2CIOPINTSTS}}
 
{{rld|0x0d80006c|32|HW_I2CIOPINTSTS}}
−
{{rld|0x0d800070|32|HW_AIPPROT|[[Hardware/EXI|EXI]] access control}}
+
{{rld|0x0d800070|32|HW_AIPPROT|[[Hardware/Legacy#External_Interface|EXI]] access control}}
 
{{rld|0x0d800074|32|HW_AIPIOCTRL|Unknown}}
 
{{rld|0x0d800074|32|HW_AIPIOCTRL|Unknown}}
−
{{rld|0x0d800078|32|HW_VIINTEN|}}
+
{{rld|0x0d800078|32|HW_VIINTEN|Unknown}}
−
{{rld|0x0d80007c|32|HW_VIINTSTS|}}
+
{{rld|0x0d80007c|32|HW_VIINTSTS|Unknown}}
 
{{rld|0x0d800080|32|HW_USBDBG0|USB related|drs=4}}
 
{{rld|0x0d800080|32|HW_USBDBG0|USB related|drs=4}}
 
{{rld|0x0d800084|32|HW_USBDBG1}}
 
{{rld|0x0d800084|32|HW_USBDBG1}}
Line 87: Line 87:  
{{rld|0x0d800148|32|HW_ARB_PCNTCFG}}
 
{{rld|0x0d800148|32|HW_ARB_PCNTCFG}}
 
{{rld|0x0d80014c|32|HW_ARB_PCNTSTS}}
 
{{rld|0x0d80014c|32|HW_ARB_PCNTSTS}}
−
{{rld|0x0d800150|32|HW_I2CSCTRL}}
+
{{rld|0x0d800150|32|HW_I2CSCTRL|Unknown|drs=7}}
 
{{rld|0x0d800154|32|HW_I2CSSTS}}
 
{{rld|0x0d800154|32|HW_I2CSSTS}}
 
{{rld|0x0d800158|32|HW_I2CSRDEN}}
 
{{rld|0x0d800158|32|HW_I2CSRDEN}}
Line 94: Line 94:  
{{rld|0x0d800168|32|HW_I2CSVISETYUV}}
 
{{rld|0x0d800168|32|HW_I2CSVISETYUV}}
 
{{rld|0x0d80016c|32|HW_I2CSVISETFILT}}
 
{{rld|0x0d80016c|32|HW_I2CSVISETFILT}}
−
{{rld|0x0d800170|32|HW_SPARE2}}
+
{{rld|0x0d800170|32|HW_SPARE2|Unknown}}
−
{{rld|0x0d800174|32|HW_SPARE3}}
+
{{rld|0x0d800174|32|HW_SPARE3|Unknown}}
 
{{rld|0x0d800180|32|HW_COMPAT|Drive interface resets}}
 
{{rld|0x0d800180|32|HW_COMPAT|Drive interface resets}}
 
{{rld|0x0d800184|32|HW_RSTAHB|Memory resets}}
 
{{rld|0x0d800184|32|HW_RSTAHB|Memory resets}}
−
{{rld|0x0d800188|32|HW_SPARE0|}}
+
{{rld|0x0d800188|32|HW_SPARE0|Unknown}}
 
{{rla|0x0d80018c|32|HW_SPARE1|Maps boot0 and controls a few other things}}
 
{{rla|0x0d80018c|32|HW_SPARE1|Maps boot0 and controls a few other things}}
 
{{rld|0x0d800190|32|HW_SYSCTRL|System control}}
 
{{rld|0x0d800190|32|HW_SYSCTRL|System control}}
Line 134: Line 134:  
{{rld|0x0d800210|32|HW_SIINT}}
 
{{rld|0x0d800210|32|HW_SIINT}}
 
{{rla|0x0d800214|32|HW_CHIPREVID|Hardware version (Wood)}}
 
{{rla|0x0d800214|32|HW_CHIPREVID|Hardware version (Wood)}}
−
{{rla|0x0d800218|32|HW_DBGBUSRD|}}
+
{{rla|0x0d800218|32|HW_DBGBUSRD|Unknown}}
 
{{rld|0x0d800224|32|UNKNOWN|Unknown}}
 
{{rld|0x0d800224|32|UNKNOWN|Unknown}}
 
{{rld|0x0d800250|32|HW_AVE_I2C_CLOCK{{check}}|[[Hardware/Latte I²C|AV encoder I²C]]|drs=4}}
 
{{rld|0x0d800250|32|HW_AVE_I2C_CLOCK{{check}}|[[Hardware/Latte I²C|AV encoder I²C]]|drs=4}}
Retrieved from "https://wiiubrew.org/wiki/Special:MobileDiff/3586"

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