Line 128:
Line 128:
{{rld|0x0d8001f8|32|HW_OBSCLKOCTRL}}
{{rld|0x0d8001f8|32|HW_OBSCLKOCTRL}}
{{rld|0x0d8001fc|32|HW_OBSCLKICTRL}}
{{rld|0x0d8001fc|32|HW_OBSCLKICTRL}}
−
{{rld|0x0d800200|32|HW_DBGPORT}}
+
{{rla|0x0d800200|32|LT_DBGPORT}}
{{rld|0x0d800204|32|HW_SICLKDIV|SI related|drs=4}}
{{rld|0x0d800204|32|HW_SICLKDIV|SI related|drs=4}}
{{rld|0x0d800208|32|HW_SICTRL}}
{{rld|0x0d800208|32|HW_SICTRL}}
Line 134:
Line 134:
{{rld|0x0d800210|32|HW_SIINT}}
{{rld|0x0d800210|32|HW_SIINT}}
{{rla|0x0d800214|32|HW_CHIPREVID|Hardware version (Wood)}}
{{rla|0x0d800214|32|HW_CHIPREVID|Hardware version (Wood)}}
−
{{rla|0x0d800218|32|HW_DBGBUSRD|Unknown}}
+
{{rla|0x0d800218|32|LT_DBGBUSRD|Unknown}}
{{rld|0x0d800224|32|UNKNOWN|Unknown}}
{{rld|0x0d800224|32|UNKNOWN|Unknown}}
{{rld|0x0d800250|32|HW_AVE_I2C_CLOCK{{check}}|[[Hardware/Latte I²C|AV encoder I²C]]|drs=4}}
{{rld|0x0d800250|32|HW_AVE_I2C_CLOCK{{check}}|[[Hardware/Latte I²C|AV encoder I²C]]|drs=4}}
Line 324:
Line 324:
|BOOT0|Disable boot0 mapping to either x'fffe_0000 or x'ffff_0000 depending on LT_MEMMIRR
|BOOT0|Disable boot0 mapping to either x'fffe_0000 or x'ffff_0000 depending on LT_MEMMIRR
|DSKPLLSRC|According to STM, setting this to 00 "puts DSKPLL back to external reference"
|DSKPLLSRC|According to STM, setting this to 00 "puts DSKPLL back to external reference"
+
}}
+
+
{{reg32 | LT_DBGPORT | addr = 0x0d800200 | hifields = 2 | lofields = 3 |
+
|5 |11 |
+
|? |R/W |
+
| |DBG_ID ||
+
|1 |14 |1 |
+
|R/W |? | |
+
|DBGPORT_BIT15 | |GPIO_EN|
+
}}
+
This seems to select internal debug values to be viewed in LT_DBGBUSRD, as well as [[Hardware/Latte_GPIOs|external GPIOs]] if GPIO_EN is set. Values are split by u16s.
+
{{regdesc
+
|DBG_ID|Selects the values outputted to the low and high LT_DBGBUSRD u16s.
+
|DBGPORT_BIT15|Mirrors the upper u16 in LT_DBGBUSRD to the lower u16.
+
|GPIO_EN|Outputs {LT_DBGBUSRD[11:8], LT_DBGBUSRD[15:12]} to [[Hardware/Latte_GPIOs|NDEV_LED]] (and other GPIOs?)
}}
}}