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{{regsimple2|LT_GPIO_OWNER|addr=0x0d8000fc|bits=32|split=24|access=R/W}}

{{regsimple2|LT_GPIO_OWNER|addr=0x0d8000fc|bits=32|split=24|access=R/W}}

This register configures which pins can be controlled by the LT_GPIOE registers. A one bit configures the pin for control via the LT_GPIOE registers, which lets it be accessed by the Espresso. A zero bit restricts access to the LT_GPIO registers, which are Starbuck-only. The LT_GPIO registers always have read access to all pins, but any writes (changes) must go through the LT_GPIOB registers if the corresponding bit is set in the LT_GPIO_OWNER register.

This register configures which pins can be controlled by the LT_GPIOE registers. A one bit configures the pin for control via the LT_GPIOE registers, which lets it be accessed by the Espresso. A zero bit restricts access to the LT_GPIO registers, which are Starbuck-only. The LT_GPIO registers always have read access to all pins, but any writes (changes) must go through the LT_GPIOE registers if the corresponding bit is set in the LT_GPIO_OWNER register.

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{{regsimple2|LT_GPIOE_OUT|addr=0x0d8000c0|bits=32|split=24|access=R/W}}

{{regsimple2|LT_GPIOE_OUT|addr=0x0d8000c0|bits=32|split=24|access=R/W}}