Difference between revisions of "Motherboard"
Jump to navigation
Jump to search
m (Hexkyz moved page Wii U/console/motherboard to Motherboard: Condensing hardware pages) |
(Completely revamp the page. WUP-30 scans will be added soontm) |
||
| Line 1: | Line 1: | ||
| − | + | The Wii U had 3 motherboard revisions after the launch WUP-01 board. | |
| − | |||
| − | + | == WUP-01 == | |
| + | === Top view (SIDE-B) === | ||
| + | [[File:WUP-01_top.jpg|500px]] | ||
| + | === Bottom view (SIDE-A) === | ||
| + | [[File:WUP-01_bottom.jpg|500px]] | ||
| − | + | == WUP-30 == | |
| + | === Top view (SIDE-B) === | ||
| + | TODO | ||
| + | === Bottom view (SIDE-A) === | ||
| + | TODO | ||
| − | === | + | == WUP-40 == |
| − | [[File: | + | === Top view (SIDE-B) === |
| + | [[File:WUP-40_top.jpg|500px]] | ||
| + | === Bottom view (SIDE-A) === | ||
| + | [[File:WUP-40_bottom.jpg|500px]] | ||
| − | === Chip listing: | + | == WUP-50 == |
| + | === Top view (SIDE-B) === | ||
| + | [[File:WUP-50_top.jpg|500px]] | ||
| + | === Bottom view (SIDE-A) === | ||
| + | [[File:WUP-50_bottom.jpg|500px]] | ||
| + | |||
| + | == Chip listing: == | ||
{| class="wikitable sortable" | {| class="wikitable sortable" | ||
! Label | ! Label | ||
| − | |||
! Chip Name | ! Chip Name | ||
! Datasheet | ! Datasheet | ||
| Line 18: | Line 33: | ||
|- | |- | ||
|U1 | |U1 | ||
| − | |||
|"(c)'12 NINTENDO" "AMD" "IBM" "RENESAS JAPAN" "C120234F5-852-UAA A" "1229LP7B7" | |"(c)'12 NINTENDO" "AMD" "IBM" "RENESAS JAPAN" "C120234F5-852-UAA A" "1229LP7B7" | ||
|None availaible | |None availaible | ||
| − | |Contains two dies: the GPU and the [[Hardware/Starbuck|Starbuck]]/[[Hardware/Espresso|Espresso]] | + | |Contains two dies: the GPU and the [[Hardware/Starbuck|Starbuck]]/[[Hardware/Espresso|Espresso]]. WUP-50 contains the revised B1X SoC. |
|- | |- | ||
|U2-5 | |U2-5 | ||
| − | |||
|Micron "2LE12" "D9PXV" | |Micron "2LE12" "D9PXV" | ||
|[[Media:4Gb_1_35V_DDR3L.pdf|Datasheet]] | |[[Media:4Gb_1_35V_DDR3L.pdf|Datasheet]] | ||
|RAM (4 BGA chips) (Some models use drop-in replacement hynix RAM) | |RAM (4 BGA chips) (Some models use drop-in replacement hynix RAM) | ||
|- | |- | ||
| − | | | + | |U6 |
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
|Macronix "MXIC MX" "25L6406E" "M21-12GF" "3K645400" "L122483" | |Macronix "MXIC MX" "25L6406E" "M21-12GF" "3K645400" "L122483" | ||
|[[Media:MX25L6406E_DS_EN.pdf|Datasheet]] | |[[Media:MX25L6406E_DS_EN.pdf|Datasheet]] | ||
| | | | ||
|- | |- | ||
| + | |U7 | ||
| + | |DRH-WUP 811309G31 | ||
| + | |[http://libdrc.org/docs/re/overview.html Overview] | ||
| + | |Connects the Gamepad to the SoC via 5GHz Wi-Fi and USB | ||
| + | |- | ||
| + | |U8 | ||
| + | |SMC "1537EE402" "301" | ||
| | | | ||
| − | | | + | |SMC. "1537EE402" is different depending on board revision. |
| − | |||
| − | |||
| − | |||
|- | |- | ||
|U14 | |U14 | ||
| − | |||
|Panasonic "MN864718" | |Panasonic "MN864718" | ||
| | | | ||
|HDMI Controller | |HDMI Controller | ||
| + | |- | ||
| + | |U17/U19 | ||
| + | |"L1305" "23L0002" "3N188" "200" / "S6450" "A024" "DE83" "0023" | ||
| + | | | ||
| + | |RTC. U17 (top RTC) has labels similar to those found on the MX chip on the Wii. U19 (bottom RTC) has labels similar to U1041. Only one is populated. | ||
| + | |- | ||
| + | |U18 | ||
| + | |SAMSUNG "222" "K9K8G08U1D" "SCB0" | ||
| + | |[[Media:K9k8g08u1d.pdf|Datasheet]] | ||
| + | |Wii U OS/vWii [[Hardware/TSOP_NAND|NAND Flash]] (dual 4Gb banks). Toshiba, Hynix, and Spansion NANDs were also used. | ||
| + | |- | ||
| + | |U20 | ||
| + | |SAMSUNG "228" "KLMBG4GE4A-A001" "WCF652C1" | ||
| + | |[https://web.archive.org/web/20141014035726/http://www.samsung.com/global/business/semiconductor/file/media/Samsung_eMMC_Brochure-0.pdf General info] | ||
| + | |32GB [[Hardware/EMMC NAND|eMMC]] (in 8 32Gb banks). Toshiba and Hynix eMMCs were also used. | ||
|- | |- | ||
|Q1019,1024,1037 | |Q1019,1024,1037 | ||
| − | |||
|Fairchild DC4AY | |Fairchild DC4AY | ||
| | | | ||
| − | | | + | |PFETs for 1v/1.15v switching regulators. |
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
|} | |} | ||
Revision as of 05:14, 19 November 2024
The Wii U had 3 motherboard revisions after the launch WUP-01 board.
WUP-01
Top view (SIDE-B)
Bottom view (SIDE-A)
WUP-30
Top view (SIDE-B)
TODO
Bottom view (SIDE-A)
TODO
WUP-40
Top view (SIDE-B)
Bottom view (SIDE-A)
WUP-50
Top view (SIDE-B)
Bottom view (SIDE-A)
Chip listing:
| Label | Chip Name | Datasheet | Notes |
|---|---|---|---|
| U1 | "(c)'12 NINTENDO" "AMD" "IBM" "RENESAS JAPAN" "C120234F5-852-UAA A" "1229LP7B7" | None availaible | Contains two dies: the GPU and the Starbuck/Espresso. WUP-50 contains the revised B1X SoC. |
| U2-5 | Micron "2LE12" "D9PXV" | Datasheet | RAM (4 BGA chips) (Some models use drop-in replacement hynix RAM) |
| U6 | Macronix "MXIC MX" "25L6406E" "M21-12GF" "3K645400" "L122483" | Datasheet | |
| U7 | DRH-WUP 811309G31 | Overview | Connects the Gamepad to the SoC via 5GHz Wi-Fi and USB |
| U8 | SMC "1537EE402" "301" | SMC. "1537EE402" is different depending on board revision. | |
| U14 | Panasonic "MN864718" | HDMI Controller | |
| U17/U19 | "L1305" "23L0002" "3N188" "200" / "S6450" "A024" "DE83" "0023" | RTC. U17 (top RTC) has labels similar to those found on the MX chip on the Wii. U19 (bottom RTC) has labels similar to U1041. Only one is populated. | |
| U18 | SAMSUNG "222" "K9K8G08U1D" "SCB0" | Datasheet | Wii U OS/vWii NAND Flash (dual 4Gb banks). Toshiba, Hynix, and Spansion NANDs were also used. |
| U20 | SAMSUNG "228" "KLMBG4GE4A-A001" "WCF652C1" | General info | 32GB eMMC (in 8 32Gb banks). Toshiba and Hynix eMMCs were also used. |
| Q1019,1024,1037 | Fairchild DC4AY | PFETs for 1v/1.15v switching regulators. |