Changes

| bits = 32

| bits = 32

| ppcirq = 12

| ppcirq = 12

| hwdirq = 0,10,11,17,30,31,...{{check}}

| latteirq = 0,10,11,17,30,31,...{{check}}

}}

}}

The Latte chipset includes a large register area including many miscellaneous controls. Some of these registers can be accessed by the {{Espresso}}. Address bit 23 (0x00800000) controls the permission: if it is set, then the registers are accessed with Starbuck's permission (full access). If it is clear, only the PPC subset of the registers is visible. From the PPC, the state of this bit is irrelevant, which suggests that it is forced to zero internally in one of the buses.

The Latte chipset includes a large register area including many miscellaneous controls. Some of these registers can be accessed by the Espresso. Address bit 23 (0x00800000) controls the permission: if it is set, then the registers are accessed with Starbuck's permission (full access). If it is clear, only the PPC subset of the registers is visible. From the PPC, the state of this bit is irrelevant, which suggests that it is forced to zero internally in one of the buses.

== Register list ==

== Register list ==