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→Register List: Use Processor Interface reg naming style
Line 13:
Line 13:
===Global ARM block===
===Global ARM block===
{{reglist|Global ARM block}}
{{reglist|Global ARM block}}
−{{rla|0x0d800030|32|LT_PPCIRQFLAG|PPC IRQ flags}}
+{{rla|0x0d800030|32|LT_INTSR_PPC|Triggered IRQs for the PPC}}
−{{rla|0x0d800034|32|LT_PPCIRQMASK|PPC IRQ mask}}
+{{rla|0x0d800034|32|LT_INTMR_PPC|Allowed IRQs for the PPC}}
−{{rla|0x0d800038|32|LT_ARMIRQFLAG|ARM IRQ flags}}
+{{rla|0x0d800038|32|LT_INTSR_ARM|Triggered IRQs for the ARM}}
−{{rla|0x0d80003c|32|LT_ARMIRQMASK|ARM IRQ mask}}
+{{rla|0x0d80003c|32|LT_INTMR_ARM|Allowed IRQs for the ARM}}
|}
|}
===SMP block===
===SMP block===
{{reglist|SMP block - PPC core 0}}
{{reglist|SMP block - PPC core 0}}
−{{rla|0x0d800440|32|LT_PPC0_AHBALL_IRQFLAG|PPC core 0 IRQ flags for AHB (all) IRQs}}
+{{rla|0x0d800440|32|LT_INTSR_AHBALL_PPC0|Triggered AHB (all) IRQs for PPC core 0}}
−{{rla|0x0d800444|32|LT_PPC0_AHBLT_IRQFLAG|PPC core 0 IRQ flags for AHB (Latte) IRQs}}
+{{rla|0x0d800444|32|LT_INTSR_AHBLT_PPC0|Triggered AHB (Latte) IRQs for PPC core 0}}
−{{rla|0x0d800448|32|LT_PPC0_AHBALL_IRQMASK|PPC core 0 IRQ mask for AHB (all) IRQs}}
+{{rla|0x0d800448|32|LT_INTMR_AHBALL_PPC0|Allowed AHB (all) IRQs for PPC core 0}}
−{{rla|0x0d80044c|32|LT_PPC0_AHBLT_IRQMASK|PPC core 0 IRQ mask for AHB (Latte) IRQs}}
+{{rla|0x0d80044c|32|LT_INTMR_AHBLT_PPC0|Allowed AHB (Latte) IRQs for PPC core 0}}
|}
|}
{{reglist|SMP block - PPC core 1}}
{{reglist|SMP block - PPC core 1}}
−{{rla|0x0d800450|32|LT_PPC0_AHBALL_IRQFLAG|PPC core 1 IRQ flags for AHB (all) IRQs}}
+{{rla|0x0d800450|32|LT_INTSR_AHBALL_PPC1|Triggered AHB (all) IRQs for PPC core 1}}
−{{rla|0x0d800454|32|LT_PPC0_AHBLT_IRQFLAG|PPC core 1 IRQ flags for AHB (Latte) IRQs}}
+{{rla|0x0d800454|32|LT_INTSR_AHBLT_PPC1|Triggered AHB (Latte) IRQs for PPC core 1}}
−{{rla|0x0d800458|32|LT_PPC1_AHBALL_IRQMASK|PPC core 1 IRQ mask for AHB (all) IRQs}}
+{{rla|0x0d800458|32|LT_INTMR_AHBALL_PPC1|Allowed AHB (all) IRQs for PPC core 1}}
−{{rla|0x0d80045c|32|LT_PPC1_AHBLT_IRQMASK|PPC core 1 IRQ mask for AHB (Latte) IRQs}}
+{{rla|0x0d80045c|32|LT_INTMR_AHBLT_PPC1|Allowed AHB (Latte) IRQs for PPC core 1}}
|}
|}
{{reglist|SMP block - PPC core 2}}
{{reglist|SMP block - PPC core 2}}
−{{rla|0x0d800460|32|LT_PPC0_AHBALL_IRQFLAG|PPC core 2 IRQ flags for AHB (all) IRQs}}
+{{rla|0x0d800460|32|LT_INTSR_AHBALL_PPC2|Triggered AHB (all) IRQs for PPC core 2}}
−{{rla|0x0d800464|32|LT_PPC0_AHBLT_IRQFLAG|PPC core 2 IRQ flags for AHB (Latte) IRQs}}
+{{rla|0x0d800464|32|LT_INTSR_AHBLT_PPC2|Triggered AHB (Latte) IRQs for PPC core 2}}
−{{rla|0x0d800468|32|LT_PPC2_AHBALL_IRQMASK|PPC core 2 IRQ mask for AHB (all) IRQs}}
+{{rla|0x0d800468|32|LT_INTMR_AHBALL_PPC2|Allowed AHB (all) IRQs for PPC core 2}}
−{{rla|0x0d80046c|32|LT_PPC2_AHBLT_IRQMASK|PPC core 2 IRQ mask for AHB (Latte) IRQs}}
+{{rla|0x0d80046c|32|LT_INTMR_AHBLT_PPC2|Allowed AHB (Latte) IRQs for PPC core 2}}
|}
|}