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Line 317:
Line 317:
−
− state_flag |= (boot_info_08 & 0x101E);+
−
if (error_count)
if (error_count)
{
{
− // SLEEP_EN is raised
+ // DDR_SREFRESH power flag is set
− if (state_flag & 0x00200000)
+ if (pflags_val & 0x00200000)
{
{
// Check memory
// Check memory
Line 415:
Line 415:
memset(0x08000000, 0, 0x002E0000);
memset(0x08000000, 0, 0x002E0000);
// sys_event doesn't have 0x00000008 flag (timer signal) set
+ // PON_SMC_TIMER power flag is not set
− if (!(state_flag & 0x00020000))
+ if (!(pflags_val & 0x00020000))
{
{
// Change NDEV_LED state
// Change NDEV_LED state
Line 481:
Line 481:
sub_D40AF10(0);
sub_D40AF10(0);
// SLEEP_EN is raised
+ // DDR_SREFRESH power flag is set
− if ((state_flag & 0x01E00001) == 0x00200000)
+ if ((pflags_val & 0x01E00001) == 0x00200000)
{
{
*(u32 *)boot_info_08_addr = 0;
*(u32 *)boot_info_08_addr = 0;
Line 493:
Line 493:
{
{
u32 boot_info_08 = *(u32 *)boot_info_08_addr;
u32 boot_info_08 = *(u32 *)boot_info_08_addr;
− pflags_val |= (boot_info_08 & 0x101E);
}
}
}
}
Line 506:
Line 506:
// Set boot_info_08
// Set boot_info_08
− sub_D40AC30(state_flag);
+ sub_D40AC30(pflags_val);
=== load_fw_img ===
=== load_fw_img ===
Line 921:
Line 921:
u32 onoff_val = 0;
u32 onoff_val = 0;
// Setup ODD based on boot data
+ // PON_SMC_TIMER and an unknown power flag are set
− if (state_flag & 0x00020010)
+ if (pflags_val & 0x00020010)
{
{
// Set DcdcPowerControl2 GPIO's state
// Set DcdcPowerControl2 GPIO's state