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Add MEM_MEM1_COMPAT_MODE documentation
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== Register Details ==
== Register Details ==
+{{reg16 | MEM_MEM1_COMPAT_MODE | addr = 0x0d8b42d4 | fields = 2 |
+|13|3 |
+|U |R/W |
+| |MODE|
+|}}
+This register modifies the translation of addresses to MEM1 locations in blocks of 0x100 bytes. It is modified by cafe2wii while entering vWii mode.
+
+The 25 bits of a MEM1 address can be split into 8 least significant bits of offset, left unmodified by the translation process, and 17 bits representing the block number.
+
+In mode 0, no translation is applied. This mode is normally used in WiiU mode and during boot.
+
+In mode 1, the 4 least significant bits of the block number are rotated right by 3 bits.
+
+In mode 2, the 11 least significant bits of the block number are rotated right by 3 bits.
+
+In mode 3, all 17 bits of the block number are rotated right by 3 bits. This mode is normally used in vWii mode.
+
+{{regdesc
+|MODE|MEM1 block translation mode
+}}