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no edit summary
| 0x038 (0x1C * 2) || 0x04 bytes || BC struct's CRC32
| 0x038 (0x1C * 2) || 0x04 bytes || BC struct's CRC32
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| 0x03C (0x1E * 2) || 0x02 bytes || BC struct's size
| 0x03C (0x1E * 2) || 0x02 bytes || BC struct's available size
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| 0x03E (0x1F * 2) || 0x02 bytes || BC library version
| 0x03E (0x1F * 2) || 0x02 bytes || BC library version
0x0005: Promotion (Kiosk CAT-I)
0x0005: Promotion (Kiosk CAT-I)
0x0006: OrchestraX
0x0006: OrchestraX
0x0007: WUIH (Internal retail)
0x0007: WUIH
0x0008: WUIH_DEV (Internal test)
0x0008: WUIH_DEV
0x0009: CAT_DEV_WUIH (Internal debug)
0x0009: CAT_DEV_WUIH
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| 0x05C (0x2E * 2) || 0x04 bytes || BC devicePresence
| 0x05C (0x2E * 2) || 0x04 bytes || BC devicePresence
The first 0x04 bytes of this key must match the Wii U NG ID.
The first 0x04 bytes of this key must match the Wii U NG ID.
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| 0x0C0 (0x60 * 2) || 0x02 bytes || Drive Key's Status Flag
| 0x0C0 (0x60 * 2) || 0x02 bytes || Drive key's status Flag
If the flag is 0xFFFF, the drive key is set and encrypted with the Wii U SEEPROM key.
If the flag is 0xFFFF, the drive key is set and encrypted with the Wii U SEEPROM key.
If the flag is 0x0000, the drive key is set and in plain form.
If the flag is 0x0000, the drive key is set and in plain form.
Structure containing parameters for boot0:
Structure containing parameters for boot0:
- 0x1C0 to 0x1C2 (0x02 bytes): CPU control flags.
- 0x1C0 to 0x1C2 (0x02 bytes): CPU control flags.
-> Bits 0-9 set the CPU speed in MHz used for various IO delay calculations.
-> Bits 0-9 set the CPU speed in MHz used for delay calculations.
-> Bits 10-14 set a delay before asking SMC if the SD boot combo has been pressed.
-> Bits 10-14 set a delay before checking if the SD boot combo has been pressed.
-> Bit 15, if set, causes 0x3 to be written to LT_IOP2X (increasing the ARM CPU clock multiplier) and waits for an interrupt.
-> Bit 15 causes 0x3 to be written to LT_IOP2X which increases the ARM CPU clock multiplier.
- 0x1C2 to 0x1C4 (0x02 bytes): NAND and SD control flags.
- 0x1C2 to 0x1C4 (0x02 bytes): NAND and SD control flags.
-> Bit 13 tells boot0 to overwrite NAND_BANK with the supplied value.
-> Bits 0-7 supply a custom value for the SD card clock divider.
-> Bit 14 tells boot0 to overwrite NAND_CONFIG with the supplied value.
-> Bits 8-9 set a delay before initializing the SD host controller.
-> Bit 15 tells boot0 to ignore NAND errors.
-> Bit 10 enables SD card 4-bit bus through CMD55 (SD_APP_CMD) and CMD6 (SD_APP_SET_BUS_WIDTH).
- 0x1C4 to 0x1C8 (0x04 bytes): Value to overwrite NAND_CONFIG (optional).
-> Bit 11 enables using a supplied custom value for the SD card clock divider.
- 0x1C8 to 0x1CC (0x04 bytes): Value to overwrite NAND_BANK (optional).
-> Bit 13 enables using a supplied custom value for overwriting NAND_BANK.
-> Bit 14 enables using a supplied custom value for overwriting NAND_CONFIG.
-> Bit 15 forces NAND to validate ECC data.
- 0x1C4 to 0x1C8 (0x04 bytes): Custom value for NAND_CONFIG (optional).
- 0x1C8 to 0x1CC (0x04 bytes): Custom value for NAND_BANK (optional).
- 0x1CC to 0x1D0 (0x04 bytes): CRC32 of data from 0x1C0 to 0x1CC.
- 0x1CC to 0x1D0 (0x04 bytes): CRC32 of data from 0x1C0 to 0x1CC.
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