28
edits
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Line 23:
Line 23:
{{rld|0x0d80003c|32|LT_INTMR_ARM}}
{{rld|0x0d80003c|32|LT_INTMR_ARM}}
{{rld|0x0d800040|32|UNKNOWN|Unknown}}
{{rld|0x0d800040|32|UNKNOWN|Unknown}}
−{{rld|0x0d80004c|32|UNKNOWN|Unknown}}
+{{rld|0x0d800044|32|UNKNOWN|Unknown}}
−{{rld|0x0d800050|32|LT_SYSPROTDRV_UNK1|System protection driver|drs=4}}
+{{rld|0x0d800048|32|LT_AHB_WDG_STATUS|AHB Watchdog status}}
−{{rld|0x0d800054|32|LT_SYSPROTDRV_UNK2}}
+{{rld|0x0d80004c|32|LT_AHB_WDG_CONFIG|AHB Watchdog configuration}}
−{{rld|0x0d800058|32|LT_SYSPROTDRV_UNK3}}
+{{rld|0x0d800050|32|LT_AHB_DMA_STATUS|AHB DMA status}}
−{{rld|0x0d80005c|32|LT_SYSPROTDRV_UNK4}}
+{{rld|0x0d800054|32|LT_AHB_CPU_STATUS|AHB CPU status}}
+{{rld|0x0d800058|32|LT_ERROR|Hardware error code}}
+{{rld|0x0d80005c|32|LT_ERROR_MASK|Hardware error code mask}}
{{rld|0x0d800060|32|LT_MEMIRR|Memory control{{check}}}}
{{rld|0x0d800060|32|LT_MEMIRR|Memory control{{check}}}}
{{rld|0x0d800064|32|LT_AHBPROT|Access control for the PPC to access devices on the AHB}}
{{rld|0x0d800064|32|LT_AHBPROT|Access control for the PPC to access devices on the AHB}}
Line 118:
Line 120:
{{rld|0x0d800480|32|UNKNOWN|Unknown}}
{{rld|0x0d800480|32|UNKNOWN|Unknown}}
{{rld|0x0d800484|32|UNKNOWN|Unknown}}
{{rld|0x0d800484|32|UNKNOWN|Unknown}}
−{{rld|0x0d8004a4|32|LT_SYSPROTDRV_UNK5|System protection driver (mirror?)|drs=2}}
+{{rld|0x0d8004a0|32|LT_AHB2_WDG_STATUS|AHB2 Watchdog status}}
−{{rld|0x0d8004a8|32|LT_SYSPROTDRV_UNK6}}
+{{rld|0x0d8004a4|32|LT_AHB2_DMA_STATUS|AHB2 DMA status}}
+{{rld|0x0d8004a8|32|LT_AHB2_CPU_STATUS|AHB2 CPU status}}
{{rld|0x0d800500|32|UNKNOWN|Unknown}}
{{rld|0x0d800500|32|UNKNOWN|Unknown}}
{{rld|0x0d800504|32|UNKNOWN|Unknown}}
{{rld|0x0d800504|32|UNKNOWN|Unknown}}