Changes

Add debug pin testpoints on the mainboard
Line 73: Line 73:  
| 16 || ALL || I/O || NDEV_LED || Development unit's LED (devkit only).
 
| 16 || ALL || I/O || NDEV_LED || Development unit's LED (devkit only).
 
|-
 
|-
āˆ’
| 16 || ALL || OUT || DEBUG0 || Debug Testpoint.
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| 16 || ALL || OUT || DEBUG0 || Debug Testpoint (TP50).
 
|-
 
|-
āˆ’
| 17 || ALL || OUT || DEBUG1 || Debug Testpoint.
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| 17 || ALL || OUT || DEBUG1 || Debug Testpoint (TP51).
 
|-
 
|-
āˆ’
| 18 || ALL || OUT || DEBUG2 || Debug Testpoint.
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| 18 || ALL || OUT || DEBUG2 || Debug Testpoint (TP52).
 
|-
 
|-
āˆ’
| 19 || ALL || OUT || DEBUG3 || Debug Testpoint.
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| 19 || ALL || OUT || DEBUG3 || Debug Testpoint (TP53).
 
|-
 
|-
āˆ’
| 20 || ALL || OUT || DEBUG4 || Debug Testpoint.
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| 20 || ALL || OUT || DEBUG4 || Debug Testpoint (TP55).
 
|-
 
|-
āˆ’
| 21 || ALL || OUT || DEBUG5 || Debug Testpoint.
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| 21 || ALL || OUT || DEBUG5 || Debug Testpoint (TP54).
 
|-
 
|-
āˆ’
| 22 || ALL || OUT || DEBUG6 || Debug Testpoint.
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| 22 || ALL || OUT || DEBUG6 || Debug Testpoint (TP48).
 
|-
 
|-
āˆ’
| 23 || ALL || OUT || DEBUG7 || Debug Testpoint.
+
| 23 || ALL || OUT || DEBUG7 || Debug Testpoint (TP49).
 
|-
 
|-
 
| 24 || ALL || OUT || AV1I2CClock || A/V Encoder (#1) IĀ²C Clock.
 
| 24 || ALL || OUT || AV1I2CClock || A/V Encoder (#1) IĀ²C Clock.
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{{regsimple2|LT_GPIO_OWNER|addr=0x0d80055c|bits=32|split=24|access=R/W}}
 
{{regsimple2|LT_GPIO_OWNER|addr=0x0d80055c|bits=32|split=24|access=R/W}}
 
These registers work identically to those used for the first GPIO group.
 
These registers work identically to those used for the first GPIO group.
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 +
== Debug pins ==
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The following debug pins are located on the bottom of the mainboard. The numbers represent DEBUG0 - DEBUG7 from the pin connection list above.<br>
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[[File:Wiiu_debug_pins.png|400px]]